From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Fri, 8 Dec 2017 15:19:10 +0000 (+0000)
Subject: [X86][AVX512] Tag CLWB instruction to CLFLUSH/PREFETCH scheduler class
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=4b64a06806a57ac9022282673885ea0bf93d2dd8;p=llvm

[X86][AVX512] Tag CLWB instruction to CLFLUSH/PREFETCH scheduler class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320156 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 1a495bf56df..eed129a1fa0 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2723,10 +2723,9 @@ def CLFLUSHOPT : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
                    "clflushopt\t$src", [(int_x86_clflushopt addr:$src)],
                    IIC_SSE_PREFETCH>, PD;
 
-let Predicates = [HasCLWB] in
+let Predicates = [HasCLWB], SchedRW = [WriteLoad] in
 def CLWB       : I<0xAE, MRM6m, (outs), (ins i8mem:$src), "clwb\t$src",
-                   [(int_x86_clwb addr:$src)]>, PD;
-
+                   [(int_x86_clwb addr:$src)], IIC_SSE_PREFETCH>, PD;
 
 //===----------------------------------------------------------------------===//
 // Subsystems.