From: Sanjay Patel Date: Wed, 1 Mar 2017 20:31:23 +0000 (+0000) Subject: [x86] add vector tests for more coverage of D30502; NFC X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=49ddd6627fa4e27d6d2e2b618a5f964340163dd1;p=llvm [x86] add vector tests for more coverage of D30502; NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296671 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/X86/select_const.ll b/test/CodeGen/X86/select_const.ll index 82054a314a5..46323b66218 100644 --- a/test/CodeGen/X86/select_const.ll +++ b/test/CodeGen/X86/select_const.ll @@ -260,3 +260,38 @@ define i64 @select_2_or_inc(i64 %x) { ret i64 %retval.0 } +define <4 x i32> @sel_constants_add_constant_vec(i1 %cond) { +; CHECK-LABEL: sel_constants_add_constant_vec: +; CHECK: # BB#0: +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: jne .LBB22_1 +; CHECK-NEXT: # BB#2: +; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [11,11,11,11] +; CHECK-NEXT: paddd {{.*}}(%rip), %xmm0 +; CHECK-NEXT: retq +; CHECK-NEXT: .LBB22_1: +; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [4294967292,12,1,0] +; CHECK-NEXT: paddd {{.*}}(%rip), %xmm0 +; CHECK-NEXT: retq + %sel = select i1 %cond, <4 x i32> , <4 x i32> + %bo = add <4 x i32> %sel, + ret <4 x i32> %bo +} + +define <2 x double> @sel_constants_fmul_constant_vec(i1 %cond) { +; CHECK-LABEL: sel_constants_fmul_constant_vec: +; CHECK: # BB#0: +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: jne .LBB23_1 +; CHECK-NEXT: # BB#2: +; CHECK-NEXT: movapd {{.*#+}} xmm0 = [2.330000e+01,1.100000e+01] +; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0 +; CHECK-NEXT: retq +; CHECK-NEXT: .LBB23_1: +; CHECK-NEXT: movapd {{.*#+}} xmm0 = [-4.000000e+00,1.200000e+01] +; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0 +; CHECK-NEXT: retq + %sel = select i1 %cond, <2 x double> , <2 x double> + %bo = fmul <2 x double> %sel, + ret <2 x double> %bo +}