From: Diana Picus Date: Tue, 7 May 2019 10:48:01 +0000 (+0000) Subject: [ARM GlobalISel] Widen G_INTTOPTR/G_PTRTOINT X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=48056fccb1c3f4d3bb098cccec6e46068b4afcbc;p=llvm [ARM GlobalISel] Widen G_INTTOPTR/G_PTRTOINT We actually have a couple of G_PTRTOINT to s8 when building clang, so we should do something about them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360130 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMLegalizerInfo.cpp b/lib/Target/ARM/ARMLegalizerInfo.cpp index f118cdf0307..59e3409cad5 100644 --- a/lib/Target/ARM/ARMLegalizerInfo.cpp +++ b/lib/Target/ARM/ARMLegalizerInfo.cpp @@ -114,8 +114,12 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) { setAction({Op, s32}, Libcall); } - getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s32}}); - getActionDefinitionsBuilder(G_PTRTOINT).legalFor({{s32, p0}}); + getActionDefinitionsBuilder(G_INTTOPTR) + .legalFor({{p0, s32}}) + .minScalar(1, s32); + getActionDefinitionsBuilder(G_PTRTOINT) + .legalFor({{s32, p0}}) + .minScalar(0, s32); getActionDefinitionsBuilder(G_CONSTANT) .legalFor({s32, p0}) diff --git a/test/CodeGen/ARM/GlobalISel/arm-legalize-casts.mir b/test/CodeGen/ARM/GlobalISel/arm-legalize-casts.mir index c45bc3d5385..1a6a0dba1b3 100644 --- a/test/CodeGen/ARM/GlobalISel/arm-legalize-casts.mir +++ b/test/CodeGen/ARM/GlobalISel/arm-legalize-casts.mir @@ -3,6 +3,9 @@ --- | define void @test_inttoptr_s32() { ret void } define void @test_ptrtoint_s32() { ret void } + + define void @test_inttoptr_s16() { ret void } + define void @test_ptrtoint_s8() { ret void } ... --- name: test_inttoptr_s32 @@ -48,3 +51,60 @@ body: | $r0 = COPY %1(s32) BX_RET 14, $noreg, implicit $r0 ... +--- +name: test_inttoptr_s16 +# CHECK-LABEL: name: test_inttoptr_s16 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: $r0 + + %0(s32) = COPY $r0 + %1(s16) = G_TRUNC %0(s32) + %2(p0) = G_INTTOPTR %1(s16) + ; G_INTTOPTR with s16 should zero extend + ; CHECK-NOT: G_INTTOPTR {{%[0-9]+}}(s16) + ; CHECK: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; CHECK: [[X32:%[0-9]+]]:_(s32) = G_AND {{%[0-9]+}}, [[BITS]] + ; CHECK: {{%[0-9]+}}:_(p0) = G_INTTOPTR [[X32]](s32) + ; CHECK-NOT: G_INTTOPTR {{%[0-9]+}}(s16) + $r0 = COPY %2(p0) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_ptrtoint_s8 +# CHECK-LABEL: name: test_ptrtoint_s8 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: $r0 + + %0(p0) = COPY $r0 + %1(s8) = G_PTRTOINT %0(p0) + ; G_PTRTOINT with s8 should truncate + ; CHECK-NOT: {{%[0-9]+}}(s8) = G_PTRTOINT + ; CHECK: [[X32:%[0-9]+]]:_(s32) = G_PTRTOINT {{%[0-9]+}}(p0) + ; CHECK: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[X32]] + ; CHECK: {{%[0-9]+}}:_(s32) = G_AND [[COPY]], [[BITS]] + ; CHECK-NOT: {{%[0-9]+}}(s8) = G_PTRTOINT + %2(s32) = G_ZEXT %1(s8) + $r0 = COPY %2(s32) + BX_RET 14, $noreg, implicit $r0 +...