From: Sanjay Patel <spatel@rotateright.com>
Date: Tue, 15 Aug 2017 17:41:31 +0000 (+0000)
Subject: [InstCombine] add tests for sext+ashr; NFC
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=47a152256e07f42629b248fe3b8840a8bc0d568b;p=llvm

[InstCombine] add tests for sext+ashr; NFC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310935 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/Transforms/InstCombine/shift-sra.ll b/test/Transforms/InstCombine/shift-sra.ll
index 4483e60b506..8aaa1a5cb49 100644
--- a/test/Transforms/InstCombine/shift-sra.ll
+++ b/test/Transforms/InstCombine/shift-sra.ll
@@ -20,8 +20,8 @@ define i32 @test2(i8 %tmp) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:    [[TMP3:%.*]] = zext i8 %tmp to i32
 ; CHECK-NEXT:    [[TMP4:%.*]] = add nuw nsw i32 [[TMP3]], 7
-; CHECK-NEXT:    [[TMP51:%.*]] = lshr i32 [[TMP4]], 3
-; CHECK-NEXT:    ret i32 [[TMP51]]
+; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[TMP4]], 3
+; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %tmp3 = zext i8 %tmp to i32
   %tmp4 = add i32 %tmp3, 7
@@ -163,3 +163,59 @@ define <2 x i32> @ashr_overshift_splat_vec(<2 x i32> %x) {
   ret <2 x i32> %sh2
 }
 
+; TODO: Prefer a narrow shift for better for bit-tracking.
+; ashr (sext X), C --> sext (ashr X, C')
+
+define i32 @hoist_ashr_ahead_of_sext_1(i8 %x) {
+; CHECK-LABEL: @hoist_ashr_ahead_of_sext_1(
+; CHECK-NEXT:    [[SEXT:%.*]] = sext i8 %x to i32
+; CHECK-NEXT:    [[R:%.*]] = ashr i32 [[SEXT]], 3
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %sext = sext i8 %x to i32
+  %r = ashr i32 %sext, 3
+  ret i32 %r
+}
+
+; TODO: Prefer a narrow shift for better for bit-tracking.
+; ashr (sext X), C --> sext (ashr X, C')
+
+define <2 x i32> @hoist_ashr_ahead_of_sext_1_splat(<2 x i8> %x) {
+; CHECK-LABEL: @hoist_ashr_ahead_of_sext_1_splat(
+; CHECK-NEXT:    [[SEXT:%.*]] = sext <2 x i8> %x to <2 x i32>
+; CHECK-NEXT:    [[R:%.*]] = ashr <2 x i32> [[SEXT]], <i32 3, i32 3>
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %sext = sext <2 x i8> %x to <2 x i32>
+  %r = ashr <2 x i32> %sext, <i32 3, i32 3>
+  ret <2 x i32> %r
+}
+
+; TODO: Prefer a narrow shift for better for bit-tracking.
+; ashr (sext X), C --> sext (ashr X, C') -- the shift amount must be clamped
+
+define i32 @hoist_ashr_ahead_of_sext_2(i8 %x) {
+; CHECK-LABEL: @hoist_ashr_ahead_of_sext_2(
+; CHECK-NEXT:    [[SEXT:%.*]] = sext i8 %x to i32
+; CHECK-NEXT:    [[R:%.*]] = ashr i32 [[SEXT]], 8
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %sext = sext i8 %x to i32
+  %r = ashr i32 %sext, 8
+  ret i32 %r
+}
+
+; TODO: Prefer a narrow shift for better for bit-tracking.
+; ashr (sext X), C --> sext (ashr X, C') -- the shift amount must be clamped
+
+define <2 x i32> @hoist_ashr_ahead_of_sext_2_splat(<2 x i8> %x) {
+; CHECK-LABEL: @hoist_ashr_ahead_of_sext_2_splat(
+; CHECK-NEXT:    [[SEXT:%.*]] = sext <2 x i8> %x to <2 x i32>
+; CHECK-NEXT:    [[R:%.*]] = ashr <2 x i32> [[SEXT]], <i32 8, i32 8>
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %sext = sext <2 x i8> %x to <2 x i32>
+  %r = ashr <2 x i32> %sext, <i32 8, i32 8>
+  ret <2 x i32> %r
+}
+