From: Eric Christopher Date: Fri, 30 May 2014 22:47:48 +0000 (+0000) Subject: Rename CreateTLOF->createTLOF to match the rest of the file and the X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=46949d58b99278dc0f79dcd1995c9e72f8074467;p=llvm Rename CreateTLOF->createTLOF to match the rest of the file and the rest of the targets with a similar function name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209926 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index cf4c9e61a58..11edeb7d044 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -50,7 +50,7 @@ cl::desc("disable unaligned load/store generation on PPC"), cl::Hidden); // FIXME: Remove this once the bug has been fixed! extern cl::opt ANDIGlueBug; -static TargetLoweringObjectFile *CreateTLOF(const PPCTargetMachine &TM) { +static TargetLoweringObjectFile *createTLOF(const PPCTargetMachine &TM) { if (TM.getSubtargetImpl()->isDarwin()) return new TargetLoweringObjectFileMachO(); @@ -61,7 +61,7 @@ static TargetLoweringObjectFile *CreateTLOF(const PPCTargetMachine &TM) { } PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) - : TargetLowering(TM, CreateTLOF(TM)), PPCSubTarget(*TM.getSubtargetImpl()) { + : TargetLowering(TM, createTLOF(TM)), PPCSubTarget(*TM.getSubtargetImpl()) { const PPCSubtarget *Subtarget = &TM.getSubtarget(); setPow2DivIsCheap(); @@ -7930,8 +7930,8 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N, DCI.AddToWorklist(RV.getNode()); RV = DAGCombineFastRecip(RV, DCI); if (RV.getNode()) { - // Unfortunately, RV is now NaN if the input was exactly 0. Select out - // this case and force the answer to 0. + // Unfortunately, RV is now NaN if the input was exactly 0. Select out + // this case and force the answer to 0. EVT VT = RV.getValueType();