From: Duncan P. N. Exon Smith Date: Fri, 1 Jul 2016 01:51:32 +0000 (+0000) Subject: CodeGen: Use MachineInstr& in LiveVariables API, NFC X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=4383a516d13be5bb5dac05af366dafeb127498c8;p=llvm CodeGen: Use MachineInstr& in LiveVariables API, NFC Change all the methods in LiveVariables that expect non-null MachineInstr* to take MachineInstr& and update the call sites. This clarifies the API, and designs away a class of iterator to pointer implicit conversions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274319 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/LiveVariables.h b/include/llvm/CodeGen/LiveVariables.h index 55b97dc3e71..bc210dda08c 100644 --- a/include/llvm/CodeGen/LiveVariables.h +++ b/include/llvm/CodeGen/LiveVariables.h @@ -91,9 +91,9 @@ public: /// removeKill - Delete a kill corresponding to the specified /// machine instruction. Returns true if there was a kill /// corresponding to this instruction, false otherwise. - bool removeKill(MachineInstr *MI) { - std::vector::iterator - I = std::find(Kills.begin(), Kills.end(), MI); + bool removeKill(MachineInstr &MI) { + std::vector::iterator I = + std::find(Kills.begin(), Kills.end(), &MI); if (I == Kills.end()) return false; Kills.erase(I); @@ -155,10 +155,10 @@ private: // Intermediate data structures /// HandleRegMask - Call HandlePhysRegKill for all registers clobbered by Mask. void HandleRegMask(const MachineOperand&); - void HandlePhysRegUse(unsigned Reg, MachineInstr *MI); + void HandlePhysRegUse(unsigned Reg, MachineInstr &MI); void HandlePhysRegDef(unsigned Reg, MachineInstr *MI, SmallVectorImpl &Defs); - void UpdatePhysRegDefs(MachineInstr *MI, SmallVectorImpl &Defs); + void UpdatePhysRegDefs(MachineInstr &MI, SmallVectorImpl &Defs); /// FindLastRefOrPartRef - Return the last reference or partial reference of /// the specified register. @@ -176,7 +176,7 @@ private: // Intermediate data structures /// is coming from. void analyzePHINodes(const MachineFunction& Fn); - void runOnInstr(MachineInstr *MI, SmallVectorImpl &Defs); + void runOnInstr(MachineInstr &MI, SmallVectorImpl &Defs); void runOnBlock(MachineBasicBlock *MBB, unsigned NumRegs); public: @@ -185,37 +185,37 @@ public: /// RegisterDefIsDead - Return true if the specified instruction defines the /// specified register, but that definition is dead. - bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const; + bool RegisterDefIsDead(MachineInstr &MI, unsigned Reg) const; //===--------------------------------------------------------------------===// // API to update live variable information /// replaceKillInstruction - Update register kill info by replacing a kill /// instruction with a new one. - void replaceKillInstruction(unsigned Reg, MachineInstr *OldMI, - MachineInstr *NewMI); + void replaceKillInstruction(unsigned Reg, MachineInstr &OldMI, + MachineInstr &NewMI); /// addVirtualRegisterKilled - Add information about the fact that the /// specified register is killed after being used by the specified /// instruction. If AddIfNotFound is true, add a implicit operand if it's /// not found. - void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI, + void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr &MI, bool AddIfNotFound = false) { - if (MI->addRegisterKilled(IncomingReg, TRI, AddIfNotFound)) - getVarInfo(IncomingReg).Kills.push_back(MI); + if (MI.addRegisterKilled(IncomingReg, TRI, AddIfNotFound)) + getVarInfo(IncomingReg).Kills.push_back(&MI); } /// removeVirtualRegisterKilled - Remove the specified kill of the virtual /// register from the live variable information. Returns true if the /// variable was marked as killed by the specified instruction, /// false otherwise. - bool removeVirtualRegisterKilled(unsigned reg, MachineInstr *MI) { + bool removeVirtualRegisterKilled(unsigned reg, MachineInstr &MI) { if (!getVarInfo(reg).removeKill(MI)) return false; bool Removed = false; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); + for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI.getOperand(i); if (MO.isReg() && MO.isKill() && MO.getReg() == reg) { MO.setIsKill(false); Removed = true; @@ -230,28 +230,28 @@ public: /// removeVirtualRegistersKilled - Remove all killed info for the specified /// instruction. - void removeVirtualRegistersKilled(MachineInstr *MI); + void removeVirtualRegistersKilled(MachineInstr &MI); /// addVirtualRegisterDead - Add information about the fact that the specified /// register is dead after being used by the specified instruction. If /// AddIfNotFound is true, add a implicit operand if it's not found. - void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI, + void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr &MI, bool AddIfNotFound = false) { - if (MI->addRegisterDead(IncomingReg, TRI, AddIfNotFound)) - getVarInfo(IncomingReg).Kills.push_back(MI); + if (MI.addRegisterDead(IncomingReg, TRI, AddIfNotFound)) + getVarInfo(IncomingReg).Kills.push_back(&MI); } /// removeVirtualRegisterDead - Remove the specified kill of the virtual /// register from the live variable information. Returns true if the /// variable was marked dead at the specified instruction, false /// otherwise. - bool removeVirtualRegisterDead(unsigned reg, MachineInstr *MI) { + bool removeVirtualRegisterDead(unsigned reg, MachineInstr &MI) { if (!getVarInfo(reg).removeKill(MI)) return false; bool Removed = false; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); + for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI.getOperand(i); if (MO.isReg() && MO.isDef() && MO.getReg() == reg) { MO.setIsDead(false); Removed = true; @@ -278,9 +278,8 @@ public: void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock, MachineBasicBlock *BB, std::vector &WorkList); - void HandleVirtRegDef(unsigned reg, MachineInstr *MI); - void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, - MachineInstr *MI); + void HandleVirtRegDef(unsigned reg, MachineInstr &MI); + void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, MachineInstr &MI); bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) { return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI); diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp index b30d779ad51..dd87216f5e6 100644 --- a/lib/CodeGen/LiveVariables.cpp +++ b/lib/CodeGen/LiveVariables.cpp @@ -129,7 +129,7 @@ void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo, } void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, - MachineInstr *MI) { + MachineInstr &MI) { assert(MRI->getVRegDef(reg) && "Register use before def!"); unsigned BBNum = MBB->getNumber(); @@ -140,7 +140,7 @@ void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, if (!VRInfo.Kills.empty() && VRInfo.Kills.back()->getParent() == MBB) { // Yes, this register is killed in this basic block already. Increase the // live range by updating the kill instruction. - VRInfo.Kills.back() = MI; + VRInfo.Kills.back() = &MI; return; } @@ -171,7 +171,7 @@ void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, // already marked as alive in this basic block, that means it is alive in at // least one of the successor blocks, it's not a kill. if (!VRInfo.AliveBlocks.test(BBNum)) - VRInfo.Kills.push_back(MI); + VRInfo.Kills.push_back(&MI); // Update all dominating blocks to mark them as "known live". for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), @@ -179,12 +179,12 @@ void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI); } -void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr *MI) { +void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr &MI) { VarInfo &VRInfo = getVarInfo(Reg); if (VRInfo.AliveBlocks.empty()) // If vr is not alive in any block, then defaults to dead. - VRInfo.Kills.push_back(MI); + VRInfo.Kills.push_back(&MI); } /// FindLastPartialDef - Return the last partial def of the specified register. @@ -228,7 +228,7 @@ MachineInstr *LiveVariables::FindLastPartialDef(unsigned Reg, /// HandlePhysRegUse - Turn previous partial def's into read/mod/writes. Add /// implicit defs to a machine instruction if there was an earlier def of its /// super-register. -void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) { +void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr &MI) { MachineInstr *LastDef = PhysRegDef[Reg]; // If there was a previous use or a "full" def all is well. if (!LastDef && !PhysRegUse[Reg]) { @@ -273,7 +273,7 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) { // Remember this use. for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); SubRegs.isValid(); ++SubRegs) - PhysRegUse[*SubRegs] = MI; + PhysRegUse[*SubRegs] = &MI; } /// FindLastRefOrPartRef - Return the last reference or partial reference of @@ -483,7 +483,7 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI, Defs.push_back(Reg); // Remember this def. } -void LiveVariables::UpdatePhysRegDefs(MachineInstr *MI, +void LiveVariables::UpdatePhysRegDefs(MachineInstr &MI, SmallVectorImpl &Defs) { while (!Defs.empty()) { unsigned Reg = Defs.back(); @@ -491,21 +491,21 @@ void LiveVariables::UpdatePhysRegDefs(MachineInstr *MI, for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); SubRegs.isValid(); ++SubRegs) { unsigned SubReg = *SubRegs; - PhysRegDef[SubReg] = MI; + PhysRegDef[SubReg] = &MI; PhysRegUse[SubReg] = nullptr; } } } -void LiveVariables::runOnInstr(MachineInstr *MI, +void LiveVariables::runOnInstr(MachineInstr &MI, SmallVectorImpl &Defs) { - assert(!MI->isDebugValue()); + assert(!MI.isDebugValue()); // Process all of the operands of the instruction... - unsigned NumOperandsToProcess = MI->getNumOperands(); + unsigned NumOperandsToProcess = MI.getNumOperands(); // Unless it is a PHI node. In this case, ONLY process the DEF, not any // of the uses. They will be handled in other basic blocks. - if (MI->isPHI()) + if (MI.isPHI()) NumOperandsToProcess = 1; // Clear kill and dead markers. LV will recompute them. @@ -513,7 +513,7 @@ void LiveVariables::runOnInstr(MachineInstr *MI, SmallVector DefRegs; SmallVector RegMasks; for (unsigned i = 0; i != NumOperandsToProcess; ++i) { - MachineOperand &MO = MI->getOperand(i); + MachineOperand &MO = MI.getOperand(i); if (MO.isRegMask()) { RegMasks.push_back(i); continue; @@ -538,7 +538,7 @@ void LiveVariables::runOnInstr(MachineInstr *MI, } } - MachineBasicBlock *MBB = MI->getParent(); + MachineBasicBlock *MBB = MI.getParent(); // Process all uses. for (unsigned i = 0, e = UseRegs.size(); i != e; ++i) { unsigned MOReg = UseRegs[i]; @@ -550,7 +550,7 @@ void LiveVariables::runOnInstr(MachineInstr *MI, // Process all masked registers. (Call clobbers). for (unsigned i = 0, e = RegMasks.size(); i != e; ++i) - HandleRegMask(MI->getOperand(RegMasks[i])); + HandleRegMask(MI.getOperand(RegMasks[i])); // Process all defs. for (unsigned i = 0, e = DefRegs.size(); i != e; ++i) { @@ -558,7 +558,7 @@ void LiveVariables::runOnInstr(MachineInstr *MI, if (TargetRegisterInfo::isVirtualRegister(MOReg)) HandleVirtRegDef(MOReg, MI); else if (!MRI->isReserved(MOReg)) - HandlePhysRegDef(MOReg, MI, Defs); + HandlePhysRegDef(MOReg, &MI, Defs); } UpdatePhysRegDefs(MI, Defs); } @@ -580,7 +580,7 @@ void LiveVariables::runOnBlock(MachineBasicBlock *MBB, const unsigned NumRegs) { continue; DistanceMap.insert(std::make_pair(&MI, Dist++)); - runOnInstr(&MI, Defs); + runOnInstr(MI, Defs); } // Handle any virtual assignments from PHI nodes which might be at the @@ -680,17 +680,17 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) { /// replaceKillInstruction - Update register kill info by replacing a kill /// instruction with a new one. -void LiveVariables::replaceKillInstruction(unsigned Reg, MachineInstr *OldMI, - MachineInstr *NewMI) { +void LiveVariables::replaceKillInstruction(unsigned Reg, MachineInstr &OldMI, + MachineInstr &NewMI) { VarInfo &VI = getVarInfo(Reg); - std::replace(VI.Kills.begin(), VI.Kills.end(), OldMI, NewMI); + std::replace(VI.Kills.begin(), VI.Kills.end(), &OldMI, &NewMI); } /// removeVirtualRegistersKilled - Remove all killed info for the specified /// instruction. -void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); +void LiveVariables::removeVirtualRegistersKilled(MachineInstr &MI) { + for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI.getOperand(i); if (MO.isReg() && MO.isKill()) { MO.setIsKill(false); unsigned Reg = MO.getReg(); diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp index 54fcf41a438..e2d0c4b7e85 100644 --- a/lib/CodeGen/MachineBasicBlock.cpp +++ b/lib/CodeGen/MachineBasicBlock.cpp @@ -745,7 +745,7 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, continue; unsigned Reg = OI->getReg(); if (TargetRegisterInfo::isPhysicalRegister(Reg) || - LV->getVarInfo(Reg).removeKill(MI)) { + LV->getVarInfo(Reg).removeKill(*MI)) { KilledRegs.push_back(Reg); DEBUG(dbgs() << "Removing terminator kill: " << *MI); OI->setIsKill(false); diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp index f593fafe774..b8d54315d14 100644 --- a/lib/CodeGen/PHIElimination.cpp +++ b/lib/CodeGen/PHIElimination.cpp @@ -283,7 +283,7 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, if (reusedIncoming) if (MachineInstr *OldKill = VI.findKill(&MBB)) { DEBUG(dbgs() << "Remove old kill from " << *OldKill); - LV->removeVirtualRegisterKilled(IncomingReg, OldKill); + LV->removeVirtualRegisterKilled(IncomingReg, *OldKill); DEBUG(MBB.dump()); } @@ -291,18 +291,18 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, // killed. Note that because the value is defined in several places (once // each for each incoming block), the "def" block and instruction fields // for the VarInfo is not filled in. - LV->addVirtualRegisterKilled(IncomingReg, &PHICopy); + LV->addVirtualRegisterKilled(IncomingReg, PHICopy); } // Since we are going to be deleting the PHI node, if it is the last use of // any registers, or if the value itself is dead, we need to move this // information over to the new copy we just inserted. - LV->removeVirtualRegistersKilled(MPhi); + LV->removeVirtualRegistersKilled(*MPhi); // If the result is dead, update LV. if (isDead) { - LV->addVirtualRegisterDead(DestReg, &PHICopy); - LV->removeVirtualRegisterDead(DestReg, MPhi); + LV->addVirtualRegisterDead(DestReg, PHICopy); + LV->removeVirtualRegisterDead(DestReg, *MPhi); } } @@ -452,7 +452,7 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); // Finally, mark it killed. - LV->addVirtualRegisterKilled(SrcReg, &*KillInst); + LV->addVirtualRegisterKilled(SrcReg, *KillInst); // This vreg no longer lives all of the way through opBlock. unsigned opBlockNum = opBlock.getNumber(); diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 649a6b906fc..a46dbe0b667 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -298,7 +298,7 @@ sink3AddrInstruction(MachineInstr *MI, unsigned SavedReg, KillMO->setIsKill(true); if (LV) - LV->replaceKillInstruction(SavedReg, KillMI, MI); + LV->replaceKillInstruction(SavedReg, *KillMI, *MI); } // Move instruction to its destination. @@ -971,8 +971,8 @@ rescheduleMIBelowKill(MachineBasicBlock::iterator &mi, if (LIS) { LIS->handleMove(*MI); } else { - LV->removeVirtualRegisterKilled(Reg, KillMI); - LV->addVirtualRegisterKilled(Reg, MI); + LV->removeVirtualRegisterKilled(Reg, *KillMI); + LV->addVirtualRegisterKilled(Reg, *MI); } DEBUG(dbgs() << "\trescheduled below kill: " << *KillMI); @@ -1139,8 +1139,8 @@ rescheduleKillAboveMI(MachineBasicBlock::iterator &mi, if (LIS) { LIS->handleMove(*KillMI); } else { - LV->removeVirtualRegisterKilled(Reg, KillMI); - LV->addVirtualRegisterKilled(Reg, MI); + LV->removeVirtualRegisterKilled(Reg, *KillMI); + LV->addVirtualRegisterKilled(Reg, *MI); } DEBUG(dbgs() << "\trescheduled kill: " << *KillMI); @@ -1346,25 +1346,25 @@ tryInstructionTransform(MachineBasicBlock::iterator &mi, if (MO.isUse()) { if (MO.isKill()) { if (NewMIs[0]->killsRegister(MO.getReg())) - LV->replaceKillInstruction(MO.getReg(), &MI, NewMIs[0]); + LV->replaceKillInstruction(MO.getReg(), MI, *NewMIs[0]); else { assert(NewMIs[1]->killsRegister(MO.getReg()) && "Kill missing after load unfold!"); - LV->replaceKillInstruction(MO.getReg(), &MI, NewMIs[1]); + LV->replaceKillInstruction(MO.getReg(), MI, *NewMIs[1]); } } - } else if (LV->removeVirtualRegisterDead(MO.getReg(), &MI)) { + } else if (LV->removeVirtualRegisterDead(MO.getReg(), MI)) { if (NewMIs[1]->registerDefIsDead(MO.getReg())) - LV->addVirtualRegisterDead(MO.getReg(), NewMIs[1]); + LV->addVirtualRegisterDead(MO.getReg(), *NewMIs[1]); else { assert(NewMIs[0]->registerDefIsDead(MO.getReg()) && "Dead flag missing after load unfold!"); - LV->addVirtualRegisterDead(MO.getReg(), NewMIs[0]); + LV->addVirtualRegisterDead(MO.getReg(), *NewMIs[0]); } } } } - LV->addVirtualRegisterKilled(Reg, NewMIs[1]); + LV->addVirtualRegisterKilled(Reg, *NewMIs[1]); } SmallVector OrigRegs; @@ -1573,10 +1573,10 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI, } // Update live variables for regB. - if (RemovedKillFlag && LV && LV->getVarInfo(RegB).removeKill(MI)) { + if (RemovedKillFlag && LV && LV->getVarInfo(RegB).removeKill(*MI)) { MachineBasicBlock::iterator PrevMI = MI; --PrevMI; - LV->addVirtualRegisterKilled(RegB, PrevMI); + LV->addVirtualRegisterKilled(RegB, *PrevMI); } // Update LiveIntervals. @@ -1786,7 +1786,7 @@ eliminateRegSequence(MachineBasicBlock::iterator &MBBI) { // Update LiveVariables' kill info. if (LV && isKill && !TargetRegisterInfo::isPhysicalRegister(SrcReg)) - LV->replaceKillInstruction(SrcReg, MI, CopyMI); + LV->replaceKillInstruction(SrcReg, *MI, *CopyMI); DEBUG(dbgs() << "Inserted: " << *CopyMI); } diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index defb24cfe7b..9ed2f595d46 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -274,7 +274,7 @@ MachineInstr *ARMBaseInstrInfo::convertToThreeAddress( if (MO.isDef()) { MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI; if (MO.isDead()) - LV->addVirtualRegisterDead(Reg, NewMI); + LV->addVirtualRegisterDead(Reg, *NewMI); } if (MO.isUse() && MO.isKill()) { for (unsigned j = 0; j < 2; ++j) { @@ -282,8 +282,8 @@ MachineInstr *ARMBaseInstrInfo::convertToThreeAddress( MachineInstr *NewMI = NewMIs[j]; if (!NewMI->readsRegister(Reg)) continue; - LV->addVirtualRegisterKilled(Reg, NewMI); - if (VI.removeKill(&MI)) + LV->addVirtualRegisterKilled(Reg, *NewMI); + if (VI.removeKill(MI)) VI.Kills.push_back(NewMI); break; } diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp index ed11dcfab4f..24217800e5e 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -760,7 +760,7 @@ static MachineInstr *finishConvertToThreeAddress(MachineInstr *OldMI, for (unsigned I = 1; I < NumOps; ++I) { MachineOperand &Op = OldMI->getOperand(I); if (Op.isReg() && Op.isKill()) - LV->replaceKillInstruction(Op.getReg(), OldMI, NewMI); + LV->replaceKillInstruction(Op.getReg(), *OldMI, *NewMI); } } transferDeadCC(OldMI, NewMI); diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 1254cbc18c0..79a1ddea786 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -2713,7 +2713,7 @@ MachineInstr *X86InstrInfo::convertToThreeAddressWithLEA( addRegReg(MIB, leaInReg, true, leaInReg2, true); } if (LV && isKill2 && InsMI2) - LV->replaceKillInstruction(Src2, &MI, InsMI2); + LV->replaceKillInstruction(Src2, MI, *InsMI2); break; } } @@ -2729,9 +2729,9 @@ MachineInstr *X86InstrInfo::convertToThreeAddressWithLEA( LV->getVarInfo(leaInReg).Kills.push_back(NewMI); LV->getVarInfo(leaOutReg).Kills.push_back(ExtMI); if (isKill) - LV->replaceKillInstruction(Src, &MI, InsMI); + LV->replaceKillInstruction(Src, MI, *InsMI); if (isDead) - LV->replaceKillInstruction(Dest, &MI, ExtMI); + LV->replaceKillInstruction(Dest, MI, *ExtMI); } return ExtMI; @@ -2944,7 +2944,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, NewMI->getOperand(3).setIsUndef(isUndef2); if (LV && Src2.isKill()) - LV->replaceKillInstruction(SrcReg2, &MI, NewMI); + LV->replaceKillInstruction(SrcReg2, MI, *NewMI); break; } case X86::ADD16rr: @@ -2966,7 +2966,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, NewMI->getOperand(3).setIsUndef(isUndef2); if (LV && isKill2) - LV->replaceKillInstruction(Src2, &MI, NewMI); + LV->replaceKillInstruction(Src2, MI, *NewMI); break; } case X86::ADD64ri32: @@ -3022,9 +3022,9 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, if (LV) { // Update live variables if (Src.isKill()) - LV->replaceKillInstruction(Src.getReg(), &MI, NewMI); + LV->replaceKillInstruction(Src.getReg(), MI, *NewMI); if (Dest.isDead()) - LV->replaceKillInstruction(Dest.getReg(), &MI, NewMI); + LV->replaceKillInstruction(Dest.getReg(), MI, *NewMI); } MFI->insert(MI.getIterator(), NewMI); // Insert the new inst