From: Simon Pilgrim Date: Fri, 14 Apr 2017 15:05:57 +0000 (+0000) Subject: [X86][SSE] Update MOVNTDQA non-temporal loads to generic implementation (clang) X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=437675cc8853d7b449557f01ffddb28e11010d56;p=clang [X86][SSE] Update MOVNTDQA non-temporal loads to generic implementation (clang) MOVNTDQA non-temporal aligned vector loads can be correctly represented using generic builtin loads, allowing us to remove the existing x86 intrinsics. LLVM companion patch: D31767. Differential Revision: https://reviews.llvm.org/D31766 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@300326 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def index e246175884..c8a3c2f4d3 100644 --- a/include/clang/Basic/BuiltinsX86.def +++ b/include/clang/Basic/BuiltinsX86.def @@ -391,7 +391,6 @@ TARGET_BUILTIN(__builtin_ia32_roundsd, "V2dV2dV2dIi", "", "sse4.1") TARGET_BUILTIN(__builtin_ia32_roundpd, "V2dV2dIi", "", "sse4.1") TARGET_BUILTIN(__builtin_ia32_dpps, "V4fV4fV4fIc", "", "sse4.1") TARGET_BUILTIN(__builtin_ia32_dppd, "V2dV2dV2dIc", "", "sse4.1") -TARGET_BUILTIN(__builtin_ia32_movntdqa, "V2LLiV2LLiC*", "", "sse4.1") TARGET_BUILTIN(__builtin_ia32_ptestz128, "iV2LLiV2LLi", "", "sse4.1") TARGET_BUILTIN(__builtin_ia32_ptestc128, "iV2LLiV2LLi", "", "sse4.1") TARGET_BUILTIN(__builtin_ia32_ptestnzc128, "iV2LLiV2LLi", "", "sse4.1") @@ -576,7 +575,6 @@ TARGET_BUILTIN(__builtin_ia32_psrldi256, "V8iV8ii", "", "avx2") TARGET_BUILTIN(__builtin_ia32_psrld256, "V8iV8iV4i", "", "avx2") TARGET_BUILTIN(__builtin_ia32_psrlqi256, "V4LLiV4LLii", "", "avx2") TARGET_BUILTIN(__builtin_ia32_psrlq256, "V4LLiV4LLiV2LLi", "", "avx2") -TARGET_BUILTIN(__builtin_ia32_movntdqa256, "V4LLiV4LLiC*", "", "avx2") TARGET_BUILTIN(__builtin_ia32_permvarsi256, "V8iV8iV8i", "", "avx2") TARGET_BUILTIN(__builtin_ia32_permvarsf256, "V8fV8fV8i", "", "avx2") TARGET_BUILTIN(__builtin_ia32_permti256, "V4LLiV4LLiV4LLiIc", "", "avx2") @@ -1747,7 +1745,6 @@ TARGET_BUILTIN(__builtin_ia32_kortestzhi, "iUsUs","","avx512f") TARGET_BUILTIN(__builtin_ia32_kunpckhi, "UsUsUs","","avx512f") TARGET_BUILTIN(__builtin_ia32_kxnorhi, "UsUsUs","","avx512f") TARGET_BUILTIN(__builtin_ia32_kxorhi, "UsUsUs","","avx512f") -TARGET_BUILTIN(__builtin_ia32_movntdqa512, "V8LLiV8LLi*","","avx512f") TARGET_BUILTIN(__builtin_ia32_palignr512_mask, "V64cV64cV64cIiV64cULLi","","avx512bw") TARGET_BUILTIN(__builtin_ia32_dbpsadbw128_mask, "V8sV16cV16cIiV8sUc","","avx512bw,avx512vl") TARGET_BUILTIN(__builtin_ia32_dbpsadbw256_mask, "V16sV32cV32cIiV16sUs","","avx512bw,avx512vl") diff --git a/lib/Headers/avx2intrin.h b/lib/Headers/avx2intrin.h index 13bcbef4db..5d83a8db48 100644 --- a/lib/Headers/avx2intrin.h +++ b/lib/Headers/avx2intrin.h @@ -832,7 +832,7 @@ _mm256_xor_si256(__m256i __a, __m256i __b) static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_stream_load_si256(__m256i const *__V) { - return (__m256i)__builtin_ia32_movntdqa256((const __v4di *)__V); + return (__m256i)__builtin_nontemporal_load((const __v4di *)__V); } static __inline__ __m128 __DEFAULT_FN_ATTRS diff --git a/lib/Headers/avx512fintrin.h b/lib/Headers/avx512fintrin.h index 707857f57f..d8535f7658 100644 --- a/lib/Headers/avx512fintrin.h +++ b/lib/Headers/avx512fintrin.h @@ -8931,7 +8931,7 @@ _mm512_stream_si512 (__m512i * __P, __m512i __A) static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_stream_load_si512 (void *__P) { - return __builtin_ia32_movntdqa512 ((__v8di *)__P); + return (__m512i) __builtin_nontemporal_load((const __v8di *)__P); } static __inline__ void __DEFAULT_FN_ATTRS diff --git a/lib/Headers/smmintrin.h b/lib/Headers/smmintrin.h index c73acc6028..dccba4e40b 100644 --- a/lib/Headers/smmintrin.h +++ b/lib/Headers/smmintrin.h @@ -691,7 +691,7 @@ _mm_mul_epi32 (__m128i __V1, __m128i __V2) static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_stream_load_si128 (__m128i const *__V) { - return (__m128i) __builtin_ia32_movntdqa ((const __v2di *) __V); + return (__m128i) __builtin_nontemporal_load ((const __v2di *) __V); } /* SSE4 Packed Integer Min/Max Instructions. */ diff --git a/test/CodeGen/avx2-builtins.c b/test/CodeGen/avx2-builtins.c index 31b02ac14e..10f3e715de 100644 --- a/test/CodeGen/avx2-builtins.c +++ b/test/CodeGen/avx2-builtins.c @@ -1117,7 +1117,7 @@ __m256i test_mm256_srlv_epi64(__m256i a, __m256i b) { __m256i test_mm256_stream_load_si256(__m256i const *a) { // CHECK-LABEL: test_mm256_stream_load_si256 - // CHECK: call <4 x i64> @llvm.x86.avx2.movntdqa(i8* %{{.*}}) + // CHECK: load <4 x i64>, <4 x i64>* %{{.*}}, align 32, !nontemporal return _mm256_stream_load_si256(a); } diff --git a/test/CodeGen/avx512f-builtins.c b/test/CodeGen/avx512f-builtins.c index b25df327fb..3ae80141b3 100644 --- a/test/CodeGen/avx512f-builtins.c +++ b/test/CodeGen/avx512f-builtins.c @@ -6251,7 +6251,7 @@ void test_mm512_stream_si512(__m512i * __P, __m512i __A) { __m512i test_mm512_stream_load_si512(void *__P) { // CHECK-LABEL: @test_mm512_stream_load_si512 - // CHECK: @llvm.x86.avx512.movntdqa + // CHECK: load <8 x i64>, <8 x i64>* %{{.*}}, align 64, !nontemporal return _mm512_stream_load_si512(__P); } diff --git a/test/CodeGen/sse41-builtins.c b/test/CodeGen/sse41-builtins.c index adf9609b68..b48b73ec18 100644 --- a/test/CodeGen/sse41-builtins.c +++ b/test/CodeGen/sse41-builtins.c @@ -354,7 +354,7 @@ __m128 test_mm_round_ss(__m128 x, __m128 y) { __m128i test_mm_stream_load_si128(__m128i const *a) { // CHECK-LABEL: test_mm_stream_load_si128 - // CHECK: call <2 x i64> @llvm.x86.sse41.movntdqa(i8* %{{.*}}) + // CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16, !nontemporal return _mm_stream_load_si128(a); }