From: Krzysztof Parzyszek Date: Wed, 29 Nov 2017 19:59:29 +0000 (+0000) Subject: [Hexagon] Remove HexagonISD::PACKHL X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=433d3104b8ea1dd277c57138fbd77d15201c9f75;p=llvm [Hexagon] Remove HexagonISD::PACKHL git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319352 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp index 087a6d69439..22bbb3e94df 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -2216,7 +2216,6 @@ const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const { case HexagonISD::INSERT: return "HexagonISD::INSERT"; case HexagonISD::INSERTRP: return "HexagonISD::INSERTRP"; case HexagonISD::JT: return "HexagonISD::JT"; - case HexagonISD::PACKHL: return "HexagonISD::PACKHL"; case HexagonISD::RET_FLAG: return "HexagonISD::RET_FLAG"; case HexagonISD::TC_RETURN: return "HexagonISD::TC_RETURN"; case HexagonISD::VCOMBINE: return "HexagonISD::VCOMBINE"; diff --git a/lib/Target/Hexagon/HexagonISelLowering.h b/lib/Target/Hexagon/HexagonISelLowering.h index 781e49ab2d0..9f7891e1746 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.h +++ b/lib/Target/Hexagon/HexagonISelLowering.h @@ -51,7 +51,6 @@ namespace HexagonISD { CP, // Constant pool. COMBINE, - PACKHL, VSPLAT, VASL, VASR, diff --git a/lib/Target/Hexagon/HexagonPatterns.td b/lib/Target/Hexagon/HexagonPatterns.td index 00ce6916fbd..270575aa09a 100644 --- a/lib/Target/Hexagon/HexagonPatterns.td +++ b/lib/Target/Hexagon/HexagonPatterns.td @@ -464,7 +464,7 @@ def: Pat<(v4i8 (trunc V4I16:$Rs)), // S2_vtruneh def: Pat<(v2i16 (trunc V2I32:$Rs)), - (LoReg (S2_packhl (HiReg $Rs), (LoReg $Rs)))>; + (A2_combine_ll (HiReg $Rs), (LoReg $Rs))>; // --(4) Logical --------------------------------------------------------- @@ -946,14 +946,11 @@ def SDTHexagonVCOMBINE: SDTypeProfile<1, 2, [SDTCisSameAs<1, 2>, SDTCisSubVecOfVec<1, 0>]>; def SDTHexagonVPACK: SDTypeProfile<1, 2, [SDTCisSameAs<1, 2>, SDTCisVec<1>]>; -def HexagonPACKHL: SDNode<"HexagonISD::PACKHL", SDTHexagonI64I32I32>; def HexagonCOMBINE: SDNode<"HexagonISD::COMBINE", SDTHexagonI64I32I32>; def HexagonVCOMBINE: SDNode<"HexagonISD::VCOMBINE", SDTHexagonVCOMBINE>; def HexagonVPACKE: SDNode<"HexagonISD::VPACKE", SDTHexagonVPACK>; def HexagonVPACKO: SDNode<"HexagonISD::VPACKO", SDTHexagonVPACK>; -def: OpR_RR_pat, i64, I32>; - def: Pat<(HexagonCOMBINE I32:$Rs, I32:$Rt), (Combinew $Rs, $Rt)>; // The complexity of the combines involving immediates should be greater diff --git a/test/CodeGen/Hexagon/vect/vect-packhl.ll b/test/CodeGen/Hexagon/vect/vect-infloop.ll similarity index 94% rename from test/CodeGen/Hexagon/vect/vect-packhl.ll rename to test/CodeGen/Hexagon/vect/vect-infloop.ll index dfdb019b677..4de390159fd 100644 --- a/test/CodeGen/Hexagon/vect/vect-packhl.ll +++ b/test/CodeGen/Hexagon/vect/vect-infloop.ll @@ -1,6 +1,6 @@ ; Extracted from test/CodeGen/Generic/vector-casts.ll: used to loop indefinitely. ; RUN: llc -march=hexagon < %s | FileCheck %s -; CHECK: packhl +; CHECK: combine define void @a(<2 x double>* %p, <2 x i8>* %q) { %t = load <2 x double>, <2 x double>* %p