From: Craig Topper <craig.topper@gmail.com>
Date: Tue, 27 Jun 2017 17:16:03 +0000 (+0000)
Subject: [InstCombine] Add test case demonstrating that we don't propagate nsw flag when conve... 
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=423b99d02569b9624a02b249af848409196f2fed;p=llvm

[InstCombine] Add test case demonstrating that we don't propagate nsw flag when converting mul by pow2 to shl when the type is larger than 64-bits. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306427 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/Transforms/InstCombine/mul.ll b/test/Transforms/InstCombine/mul.ll
index ff389a495d3..a775339c7b2 100644
--- a/test/Transforms/InstCombine/mul.ll
+++ b/test/Transforms/InstCombine/mul.ll
@@ -324,3 +324,13 @@ define <2 x i32> @test33vec(<2 x i32> %X) {
   %mul = mul nsw <2 x i32> %X, <i32 1073741824, i32 1073741824>
   ret <2 x i32> %mul
 }
+
+; TODO: we should propagate nsw flag to the shift here, but we only handle i64 and smaller
+define i128 @test34(i128 %X) {
+; CHECK-LABEL: @test34(
+; CHECK-NEXT:    [[MUL:%.*]] = shl i128 [[X:%.*]], 1
+; CHECK-NEXT:    ret i128 [[MUL]]
+;
+  %mul = mul nsw i128 %X, 2
+  ret i128 %mul
+}