From: Ulrich Weigand Date: Wed, 10 May 2017 12:42:45 +0000 (+0000) Subject: [SystemZ] Add decimal integer instructions X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=3f9585ca98a2c296b34c7d78a9454f32f949f121;p=llvm [SystemZ] Add decimal integer instructions This adds the set of decimal integer (BCD) instructions for assembler / disassembler use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302646 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp index 3f91ca9035a..efcf6696fd5 100644 --- a/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp +++ b/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp @@ -262,6 +262,9 @@ public: bool isMemDisp20(MemoryKind MemKind, RegisterKind RegKind) const { return isMem(MemKind, RegKind) && inRange(Mem.Disp, -524288, 524287); } + bool isMemDisp12Len4(RegisterKind RegKind) const { + return isMemDisp12(BDLMem, RegKind) && inRange(Mem.Length.Imm, 1, 0x10); + } bool isMemDisp12Len8(RegisterKind RegKind) const { return isMemDisp12(BDLMem, RegKind) && inRange(Mem.Length.Imm, 1, 0x100); } @@ -347,6 +350,7 @@ public: bool isBDAddr64Disp20() const { return isMemDisp20(BDMem, ADDR64Reg); } bool isBDXAddr64Disp12() const { return isMemDisp12(BDXMem, ADDR64Reg); } bool isBDXAddr64Disp20() const { return isMemDisp20(BDXMem, ADDR64Reg); } + bool isBDLAddr64Disp12Len4() const { return isMemDisp12Len4(ADDR64Reg); } bool isBDLAddr64Disp12Len8() const { return isMemDisp12Len8(ADDR64Reg); } bool isBDRAddr64Disp12() const { return isMemDisp12(BDRMem, ADDR64Reg); } bool isBDVAddr64Disp12() const { return isMemDisp12(BDVMem, ADDR64Reg); } diff --git a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp index a281a0aa6bc..27fd70bc609 100644 --- a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp +++ b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp @@ -327,6 +327,18 @@ static DecodeStatus decodeBDXAddr20Operand(MCInst &Inst, uint64_t Field, return MCDisassembler::Success; } +static DecodeStatus decodeBDLAddr12Len4Operand(MCInst &Inst, uint64_t Field, + const unsigned *Regs) { + uint64_t Length = Field >> 16; + uint64_t Base = (Field >> 12) & 0xf; + uint64_t Disp = Field & 0xfff; + assert(Length < 16 && "Invalid BDLAddr12Len4"); + Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); + Inst.addOperand(MCOperand::createImm(Disp)); + Inst.addOperand(MCOperand::createImm(Length + 1)); + return MCDisassembler::Success; +} + static DecodeStatus decodeBDLAddr12Len8Operand(MCInst &Inst, uint64_t Field, const unsigned *Regs) { uint64_t Length = Field >> 16; @@ -399,6 +411,13 @@ static DecodeStatus decodeBDXAddr64Disp20Operand(MCInst &Inst, uint64_t Field, return decodeBDXAddr20Operand(Inst, Field, SystemZMC::GR64Regs); } +static DecodeStatus decodeBDLAddr64Disp12Len4Operand(MCInst &Inst, + uint64_t Field, + uint64_t Address, + const void *Decoder) { + return decodeBDLAddr12Len4Operand(Inst, Field, SystemZMC::GR64Regs); +} + static DecodeStatus decodeBDLAddr64Disp12Len8Operand(MCInst &Inst, uint64_t Field, uint64_t Address, diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp b/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp index 092eb4011ad..d188f56512a 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp @@ -77,6 +77,9 @@ private: uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const; + uint64_t getBDLAddr12Len4Encoding(const MCInst &MI, unsigned OpNum, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl &Fixups, const MCSubtargetInfo &STI) const; @@ -219,6 +222,17 @@ getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum, | ((Disp & 0xff000) >> 12); } +uint64_t SystemZMCCodeEmitter:: +getBDLAddr12Len4Encoding(const MCInst &MI, unsigned OpNum, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); + uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); + uint64_t Len = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI) - 1; + assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Len)); + return (Len << 16) | (Base << 12) | Disp; +} + uint64_t SystemZMCCodeEmitter:: getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl &Fixups, diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td index 333425d2ad7..2bdcfac060a 100644 --- a/lib/Target/SystemZ/SystemZInstrFormats.td +++ b/lib/Target/SystemZ/SystemZInstrFormats.td @@ -710,6 +710,21 @@ class InstRSI op, dag outs, dag ins, string asmstr, list pattern> let Inst{15-0} = RI2; } +class InstRSLa op, dag outs, dag ins, string asmstr, list pattern> + : InstSystemZ<6, outs, ins, asmstr, pattern> { + field bits<48> Inst; + field bits<48> SoftFail = 0; + + bits<20> BDL1; + + let Inst{47-40} = op{15-8}; + let Inst{39-36} = BDL1{19-16}; + let Inst{35-32} = 0; + let Inst{31-16} = BDL1{15-0}; + let Inst{15-8} = 0; + let Inst{7-0} = op{7-0}; +} + class InstRSYa op, dag outs, dag ins, string asmstr, list pattern> : InstSystemZ<6, outs, ins, asmstr, pattern> { field bits<48> Inst; @@ -817,6 +832,37 @@ class InstSSa op, dag outs, dag ins, string asmstr, list pattern> let Inst{15-0} = BD2; } +class InstSSb op, dag outs, dag ins, string asmstr, list pattern> + : InstSystemZ<6, outs, ins, asmstr, pattern> { + field bits<48> Inst; + field bits<48> SoftFail = 0; + + bits<20> BDL1; + bits<20> BDL2; + + let Inst{47-40} = op; + let Inst{39-36} = BDL1{19-16}; + let Inst{35-32} = BDL2{19-16}; + let Inst{31-16} = BDL1{15-0}; + let Inst{15-0} = BDL2{15-0}; +} + +class InstSSc op, dag outs, dag ins, string asmstr, list pattern> + : InstSystemZ<6, outs, ins, asmstr, pattern> { + field bits<48> Inst; + field bits<48> SoftFail = 0; + + bits<20> BDL1; + bits<16> BD2; + bits<4> I3; + + let Inst{47-40} = op; + let Inst{39-36} = BDL1{19-16}; + let Inst{35-32} = I3; + let Inst{31-16} = BDL1{15-0}; + let Inst{15-0} = BD2; +} + class InstSSd op, dag outs, dag ins, string asmstr, list pattern> : InstSystemZ<6, outs, ins, asmstr, pattern> { field bits<48> Inst; @@ -850,6 +896,20 @@ class InstSSe op, dag outs, dag ins, string asmstr, list pattern> let Inst{15-0} = BD4; } +class InstSSf op, dag outs, dag ins, string asmstr, list pattern> + : InstSystemZ<6, outs, ins, asmstr, pattern> { + field bits<48> Inst; + field bits<48> SoftFail = 0; + + bits<16> BD1; + bits<24> BDL2; + + let Inst{47-40} = op; + let Inst{39-32} = BDL2{23-16}; + let Inst{31-16} = BD1; + let Inst{15-0} = BDL2{15-0}; +} + class InstSSE op, dag outs, dag ins, string asmstr, list pattern> : InstSystemZ<6, outs, ins, asmstr, pattern> { field bits<48> Inst; @@ -1642,8 +1702,9 @@ class ICV // Two input operands and an implicit CC output operand. // // Test: -// Two input operands and an implicit CC output operand. The second -// input operand is an "address" operand used as a test class mask. +// One or two input operands and an implicit CC output operand. If +// present, the second input operand is an "address" operand used as +// a test class mask. // // Ternary: // One register output operand and three input operands. @@ -2609,6 +2670,15 @@ class SideEffectBinarySSa opcode> : InstSSa; +class SideEffectBinarySSb opcode> + : InstSSb; + +class SideEffectBinarySSf opcode> + : InstSSf; + class SideEffectBinaryMemMemRR opcode, RegisterOperand cls1, RegisterOperand cls2> : InstRR rxOpcode, bits<16> rxyOpcode, } } +class CompareSSb opcode> + : InstSSb { + let isCompare = 1; + let mayLoad = 1; +} + class CompareSI opcode, SDPatternOperator operator, SDPatternOperator load, Immediate imm, AddressingMode mode = bdaddr12only> @@ -3379,6 +3457,17 @@ class TestRXE opcode, SDPatternOperator operator, let M3 = 0; } +class TestRSL opcode> + : InstRSLa { + let mayLoad = 1; +} + +class SideEffectTernarySSc opcode> + : InstSSc; + class SideEffectTernaryMemMemMemRRFb opcode, RegisterOperand cls1, RegisterOperand cls2, diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td index 7b3893e7b8e..2c93d2bb20e 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/lib/Target/SystemZ/SystemZInstrInfo.td @@ -1657,6 +1657,51 @@ let mayLoad = 1, mayStore = 1, Uses = [R0L, R1D], Defs = [CC] in { def PPNO : SideEffectBinaryMemMemRRE<"ppno", 0xB93C, GR128, GR128>; } +//===----------------------------------------------------------------------===// +// Decimal arithmetic +//===----------------------------------------------------------------------===// + +defm CVB : BinaryRXPair<"cvb",0x4F, 0xE306, null_frag, GR32, load, 4>; +def CVBG : BinaryRXY<"cvbg", 0xE30E, null_frag, GR64, load, 8>; + +defm CVD : StoreRXPair<"cvd", 0x4E, 0xE326, null_frag, GR32, 4>; +def CVDG : StoreRXY<"cvdg", 0xE32E, null_frag, GR64, 8>; + +let mayLoad = 1, mayStore = 1 in { + def MVN : SideEffectBinarySSa<"mvn", 0xD1>; + def MVZ : SideEffectBinarySSa<"mvz", 0xD3>; + def MVO : SideEffectBinarySSb<"mvo", 0xF1>; + + def PACK : SideEffectBinarySSb<"pack", 0xF2>; + def PKA : SideEffectBinarySSf<"pka", 0xE9>; + def PKU : SideEffectBinarySSf<"pku", 0xE1>; + def UNPK : SideEffectBinarySSb<"unpk", 0xF3>; + let Defs = [CC] in { + def UNPKA : SideEffectBinarySSa<"unpka", 0xEA>; + def UNPKU : SideEffectBinarySSa<"unpku", 0xE2>; + } +} + +let mayLoad = 1, mayStore = 1 in { + let Defs = [CC] in { + def AP : SideEffectBinarySSb<"ap", 0xFA>; + def SP : SideEffectBinarySSb<"sp", 0xFB>; + def ZAP : SideEffectBinarySSb<"zap", 0xF8>; + def SRP : SideEffectTernarySSc<"srp", 0xF0>; + } + def MP : SideEffectBinarySSb<"mp", 0xFC>; + def DP : SideEffectBinarySSb<"dp", 0xFD>; + let Defs = [CC] in { + def ED : SideEffectBinarySSa<"ed", 0xDE>; + def EDMK : SideEffectBinarySSa<"edmk", 0xDF>; + } +} + +let Defs = [CC] in { + def CP : CompareSSb<"cp", 0xF9>; + def TP : TestRSL<"tp", 0xEBC0>; +} + //===----------------------------------------------------------------------===// // Access registers //===----------------------------------------------------------------------===// diff --git a/lib/Target/SystemZ/SystemZOperands.td b/lib/Target/SystemZ/SystemZOperands.td index 7bb4fe5afb3..713612129d9 100644 --- a/lib/Target/SystemZ/SystemZOperands.td +++ b/lib/Target/SystemZ/SystemZOperands.td @@ -531,6 +531,7 @@ def BDAddr64Disp12 : AddressAsmOperand<"BDAddr", "64", "12">; def BDAddr64Disp20 : AddressAsmOperand<"BDAddr", "64", "20">; def BDXAddr64Disp12 : AddressAsmOperand<"BDXAddr", "64", "12">; def BDXAddr64Disp20 : AddressAsmOperand<"BDXAddr", "64", "20">; +def BDLAddr64Disp12Len4 : AddressAsmOperand<"BDLAddr", "64", "12", "Len4">; def BDLAddr64Disp12Len8 : AddressAsmOperand<"BDLAddr", "64", "12", "Len8">; def BDRAddr64Disp12 : AddressAsmOperand<"BDRAddr", "64", "12">; def BDVAddr64Disp12 : AddressAsmOperand<"BDVAddr", "64", "12">; @@ -578,6 +579,7 @@ def bdxaddr20pair : BDXMode<"BDXAddr", "64", "20", "Pair">; def dynalloc12only : BDXMode<"DynAlloc", "64", "12", "Only">; def laaddr12pair : BDXMode<"LAAddr", "64", "12", "Pair">; def laaddr20pair : BDXMode<"LAAddr", "64", "20", "Pair">; +def bdladdr12onlylen4 : BDLMode<"BDLAddr", "64", "12", "Only", "4">; def bdladdr12onlylen8 : BDLMode<"BDLAddr", "64", "12", "Only", "8">; def bdraddr12only : BDRMode<"BDRAddr", "64", "12", "Only">; def bdvaddr12only : BDVMode< "64", "12">; diff --git a/lib/Target/SystemZ/SystemZSchedule.td b/lib/Target/SystemZ/SystemZSchedule.td index dbba8ab42b5..1ce0168f95e 100644 --- a/lib/Target/SystemZ/SystemZSchedule.td +++ b/lib/Target/SystemZ/SystemZSchedule.td @@ -56,12 +56,16 @@ def LSU_lat1 : SchedWrite; // Floating point unit (zEC12 and earlier) def FPU : SchedWrite; def FPU2 : SchedWrite; +def DFU : SchedWrite; +def DFU2 : SchedWrite; // Vector sub units (z13) def VecBF : SchedWrite; def VecBF2 : SchedWrite; def VecDF : SchedWrite; def VecDF2 : SchedWrite; +def VecDFX : SchedWrite; +def VecDFX2 : SchedWrite; def VecFPd : SchedWrite; // Blocking BFP div/sqrt unit. def VecMul : SchedWrite; def VecStr : SchedWrite; diff --git a/lib/Target/SystemZ/SystemZScheduleZ13.td b/lib/Target/SystemZ/SystemZScheduleZ13.td index 8058293ca85..858f62cc7a2 100644 --- a/lib/Target/SystemZ/SystemZScheduleZ13.td +++ b/lib/Target/SystemZ/SystemZScheduleZ13.td @@ -76,6 +76,8 @@ def : WriteRes { let Latency = 8; } def : WriteRes { let Latency = 9; } def : WriteRes { let Latency = 8; } def : WriteRes { let Latency = 9; } +def : WriteRes { let Latency = 1; } +def : WriteRes { let Latency = 2; } def : WriteRes; def : InstRW<[FXa, Lat30, GroupAlone], (instregex "KM(C|F|O|CTR)?$")>; def : InstRW<[FXa, Lat30, GroupAlone], (instregex "(KIMD|KLMD|KMAC|PCC|PPNO)$")>; +//===----------------------------------------------------------------------===// +// Decimal arithmetic +//===----------------------------------------------------------------------===// + +def : InstRW<[FXb, VecDF, LSU, Lat30, GroupAlone], (instregex "CVB(Y|G)?$")>; +def : InstRW<[FXb, VecDF, FXb, Lat30, GroupAlone], (instregex "CVD(Y|G)?$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "MV(N|Z|O)$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "UNPK(A|U)?$")>; + +def : InstRW<[FXb, VecDFX, LSU, LSU, Lat9, GroupAlone], + (instregex "(A|S|ZA)P$")>; +def : InstRW<[FXb, VecDFX2, LSU, LSU, Lat30, GroupAlone], + (instregex "(M|D)P$")>; +def : InstRW<[FXb, FXb, VecDFX2, LSU, LSU, LSU, Lat15, GroupAlone], + (instregex "SRP$")>; +def : InstRW<[VecDFX, LSU, LSU, Lat5, GroupAlone], (instregex "CP$")>; +def : InstRW<[VecDFX, LSU, Lat4, GroupAlone], (instregex "TP$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "ED(MK)?$")>; + //===----------------------------------------------------------------------===// // Access registers //===----------------------------------------------------------------------===// diff --git a/lib/Target/SystemZ/SystemZScheduleZ196.td b/lib/Target/SystemZ/SystemZScheduleZ196.td index 664c674b31f..0c4a0dbbe66 100644 --- a/lib/Target/SystemZ/SystemZScheduleZ196.td +++ b/lib/Target/SystemZ/SystemZScheduleZ196.td @@ -59,6 +59,7 @@ def : WriteRes { let Latency = 30; let NumMicroOps = 0;} def Z196_FXUnit : ProcResource<2>; def Z196_LSUnit : ProcResource<2>; def Z196_FPUnit : ProcResource<1>; +def Z196_DFUnit : ProcResource<1>; // Subtarget specific definitions of scheduling resources. def : WriteRes { let Latency = 1; } @@ -66,6 +67,8 @@ def : WriteRes { let Latency = 4; } def : WriteRes { let Latency = 1; } def : WriteRes { let Latency = 8; } def : WriteRes { let Latency = 9; } +def : WriteRes { let Latency = 2; } +def : WriteRes { let Latency = 3; } // -------------------------- INSTRUCTIONS ---------------------------------- // @@ -537,6 +540,26 @@ def : InstRW<[FXU, Lat30, GroupAlone], (instregex "(CUUTF|CUTFU)(Opt)?$")>; def : InstRW<[FXU, Lat30, GroupAlone], (instregex "KM(C|F|O|CTR)?$")>; def : InstRW<[FXU, Lat30, GroupAlone], (instregex "(KIMD|KLMD|KMAC|PCC)$")>; +//===----------------------------------------------------------------------===// +// Decimal arithmetic +//===----------------------------------------------------------------------===// + +def : InstRW<[FXU, DFU, LSU, Lat30, GroupAlone], (instregex "CVB(Y|G)?$")>; +def : InstRW<[FXU, DFU, FXU, Lat30, GroupAlone], (instregex "CVD(Y|G)?$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "MV(N|Z|O)$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "UNPK(A|U)?$")>; + +def : InstRW<[FXU, FXU, DFU2, LSU, LSU, LSU, LSU, Lat15, GroupAlone], + (instregex "(A|S|ZA)P$")>; +def : InstRW<[FXU, FXU, DFU2, LSU, LSU, LSU, LSU, Lat30, GroupAlone], + (instregex "(M|D)P$")>; +def : InstRW<[FXU, FXU, DFU2, LSU, LSU, Lat15, GroupAlone], + (instregex "SRP$")>; +def : InstRW<[DFU2, LSU, LSU, LSU, LSU, Lat11, GroupAlone], (instregex "CP$")>; +def : InstRW<[DFU2, LSU, LSU, Lat3, GroupAlone], (instregex "TP$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "ED(MK)?$")>; + //===----------------------------------------------------------------------===// // Access registers //===----------------------------------------------------------------------===// diff --git a/lib/Target/SystemZ/SystemZScheduleZEC12.td b/lib/Target/SystemZ/SystemZScheduleZEC12.td index 324f5d1c76b..03865418499 100644 --- a/lib/Target/SystemZ/SystemZScheduleZEC12.td +++ b/lib/Target/SystemZ/SystemZScheduleZEC12.td @@ -59,6 +59,7 @@ def : WriteRes { let Latency = 30; let NumMicroOps = 0;} def ZEC12_FXUnit : ProcResource<2>; def ZEC12_LSUnit : ProcResource<2>; def ZEC12_FPUnit : ProcResource<1>; +def ZEC12_DFUnit : ProcResource<1>; def ZEC12_VBUnit : ProcResource<1>; // Subtarget specific definitions of scheduling resources. @@ -67,6 +68,8 @@ def : WriteRes { let Latency = 4; } def : WriteRes { let Latency = 1; } def : WriteRes { let Latency = 8; } def : WriteRes { let Latency = 9; } +def : WriteRes { let Latency = 2; } +def : WriteRes { let Latency = 3; } def : WriteRes; // Virtual Branching Unit // -------------------------- INSTRUCTIONS ---------------------------------- // @@ -549,6 +552,26 @@ def : InstRW<[FXU, Lat30, GroupAlone], (instregex "(CUUTF|CUTFU)(Opt)?$")>; def : InstRW<[FXU, Lat30, GroupAlone], (instregex "KM(C|F|O|CTR)?$")>; def : InstRW<[FXU, Lat30, GroupAlone], (instregex "(KIMD|KLMD|KMAC|PCC)$")>; +//===----------------------------------------------------------------------===// +// Decimal arithmetic +//===----------------------------------------------------------------------===// + +def : InstRW<[FXU, DFU, LSU, Lat30, GroupAlone], (instregex "CVB(Y|G)?$")>; +def : InstRW<[FXU, DFU, FXU, Lat30, GroupAlone], (instregex "CVD(Y|G)?$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "MV(N|Z|O)$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "UNPK(A|U)?$")>; + +def : InstRW<[FXU, FXU, DFU2, LSU, LSU, LSU, LSU, Lat15, GroupAlone], + (instregex "(A|S|ZA)P$")>; +def : InstRW<[FXU, FXU, DFU2, LSU, LSU, LSU, LSU, Lat30, GroupAlone], + (instregex "(M|D)P$")>; +def : InstRW<[FXU, FXU, DFU2, LSU, LSU, Lat15, GroupAlone], + (instregex "SRP$")>; +def : InstRW<[DFU2, LSU, LSU, LSU, LSU, Lat11, GroupAlone], (instregex "CP$")>; +def : InstRW<[DFU2, LSU, LSU, Lat3, GroupAlone], (instregex "TP$")>; +def : InstRW<[LSU, Lat30, GroupAlone], (instregex "ED(MK)?$")>; + //===----------------------------------------------------------------------===// // Access registers //===----------------------------------------------------------------------===// diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt index 4d1a2789f09..de191509ff5 100644 --- a/test/MC/Disassembler/SystemZ/insns.txt +++ b/test/MC/Disassembler/SystemZ/insns.txt @@ -679,6 +679,48 @@ # CHECK: aly %r15, 0 0xe3 0xf0 0x00 0x00 0x00 0x5e +# CHECK: ap 0(1), 0(1) +0xfa 0x00 0x00 0x00 0x00 0x00 + +# CHECK: ap 0(1), 0(1,%r1) +0xfa 0x00 0x00 0x00 0x10 0x00 + +# CHECK: ap 0(1), 0(1,%r15) +0xfa 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: ap 0(1), 4095(1) +0xfa 0x00 0x00 0x00 0x0f 0xff + +# CHECK: ap 0(1), 4095(1,%r1) +0xfa 0x00 0x00 0x00 0x1f 0xff + +# CHECK: ap 0(1), 4095(1,%r15) +0xfa 0x00 0x00 0x00 0xff 0xff + +# CHECK: ap 0(1,%r1), 0(1) +0xfa 0x00 0x10 0x00 0x00 0x00 + +# CHECK: ap 0(1,%r15), 0(1) +0xfa 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: ap 4095(1,%r1), 0(1) +0xfa 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: ap 4095(1,%r15), 0(1) +0xfa 0x00 0xff 0xff 0x00 0x00 + +# CHECK: ap 0(16,%r1), 0(1) +0xfa 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: ap 0(16,%r15), 0(1) +0xfa 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: ap 0(1), 0(16,%r1) +0xfa 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: ap 0(1), 0(16,%r15) +0xfa 0x0f 0x00 0x00 0xf0 0x00 + # CHECK: ar %r0, %r0 0x1a 0x00 @@ -3406,6 +3448,48 @@ # CHECK: cly %r15, 0 0xe3 0xf0 0x00 0x00 0x00 0x55 +# CHECK: cp 0(1), 0(1) +0xf9 0x00 0x00 0x00 0x00 0x00 + +# CHECK: cp 0(1), 0(1,%r1) +0xf9 0x00 0x00 0x00 0x10 0x00 + +# CHECK: cp 0(1), 0(1,%r15) +0xf9 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: cp 0(1), 4095(1) +0xf9 0x00 0x00 0x00 0x0f 0xff + +# CHECK: cp 0(1), 4095(1,%r1) +0xf9 0x00 0x00 0x00 0x1f 0xff + +# CHECK: cp 0(1), 4095(1,%r15) +0xf9 0x00 0x00 0x00 0xff 0xff + +# CHECK: cp 0(1,%r1), 0(1) +0xf9 0x00 0x10 0x00 0x00 0x00 + +# CHECK: cp 0(1,%r15), 0(1) +0xf9 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: cp 4095(1,%r1), 0(1) +0xf9 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: cp 4095(1,%r15), 0(1) +0xf9 0x00 0xff 0xff 0x00 0x00 + +# CHECK: cp 0(16,%r1), 0(1) +0xf9 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: cp 0(16,%r15), 0(1) +0xf9 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: cp 0(1), 0(16,%r1) +0xf9 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: cp 0(1), 0(16,%r15) +0xf9 0x0f 0x00 0x00 0xf0 0x00 + # CHECK: cpsdr %f0, %f0, %f0 0xb3 0x72 0x00 0x00 @@ -3754,6 +3838,168 @@ # CHECK: cuse %r6, %r8 0xb2 0x57 0x00 0x68 +# CHECK: cvb %r0, 0 +0x4f 0x00 0x00 0x00 + +# CHECK: cvb %r0, 4095 +0x4f 0x00 0x0f 0xff + +# CHECK: cvb %r0, 0(%r1) +0x4f 0x00 0x10 0x00 + +# CHECK: cvb %r0, 0(%r15) +0x4f 0x00 0xf0 0x00 + +# CHECK: cvb %r0, 4095(%r1,%r15) +0x4f 0x01 0xff 0xff + +# CHECK: cvb %r0, 4095(%r15,%r1) +0x4f 0x0f 0x1f 0xff + +# CHECK: cvb %r15, 0 +0x4f 0xf0 0x00 0x00 + +# CHECK: cvbg %r0, -524288 +0xe3 0x00 0x00 0x00 0x80 0x0e + +# CHECK: cvbg %r0, -1 +0xe3 0x00 0x0f 0xff 0xff 0x0e + +# CHECK: cvbg %r0, 0 +0xe3 0x00 0x00 0x00 0x00 0x0e + +# CHECK: cvbg %r0, 1 +0xe3 0x00 0x00 0x01 0x00 0x0e + +# CHECK: cvbg %r0, 524287 +0xe3 0x00 0x0f 0xff 0x7f 0x0e + +# CHECK: cvbg %r0, 0(%r1) +0xe3 0x00 0x10 0x00 0x00 0x0e + +# CHECK: cvbg %r0, 0(%r15) +0xe3 0x00 0xf0 0x00 0x00 0x0e + +# CHECK: cvbg %r0, 524287(%r1,%r15) +0xe3 0x01 0xff 0xff 0x7f 0x0e + +# CHECK: cvbg %r0, 524287(%r15,%r1) +0xe3 0x0f 0x1f 0xff 0x7f 0x0e + +# CHECK: cvbg %r15, 0 +0xe3 0xf0 0x00 0x00 0x00 0x0e + +# CHECK: cvby %r0, -524288 +0xe3 0x00 0x00 0x00 0x80 0x06 + +# CHECK: cvby %r0, -1 +0xe3 0x00 0x0f 0xff 0xff 0x06 + +# CHECK: cvby %r0, 0 +0xe3 0x00 0x00 0x00 0x00 0x06 + +# CHECK: cvby %r0, 1 +0xe3 0x00 0x00 0x01 0x00 0x06 + +# CHECK: cvby %r0, 524287 +0xe3 0x00 0x0f 0xff 0x7f 0x06 + +# CHECK: cvby %r0, 0(%r1) +0xe3 0x00 0x10 0x00 0x00 0x06 + +# CHECK: cvby %r0, 0(%r15) +0xe3 0x00 0xf0 0x00 0x00 0x06 + +# CHECK: cvby %r0, 524287(%r1,%r15) +0xe3 0x01 0xff 0xff 0x7f 0x06 + +# CHECK: cvby %r0, 524287(%r15,%r1) +0xe3 0x0f 0x1f 0xff 0x7f 0x06 + +# CHECK: cvby %r15, 0 +0xe3 0xf0 0x00 0x00 0x00 0x06 + +# CHECK: cvd %r0, 0 +0x4e 0x00 0x00 0x00 + +# CHECK: cvd %r0, 4095 +0x4e 0x00 0x0f 0xff + +# CHECK: cvd %r0, 0(%r1) +0x4e 0x00 0x10 0x00 + +# CHECK: cvd %r0, 0(%r15) +0x4e 0x00 0xf0 0x00 + +# CHECK: cvd %r0, 4095(%r1,%r15) +0x4e 0x01 0xff 0xff + +# CHECK: cvd %r0, 4095(%r15,%r1) +0x4e 0x0f 0x1f 0xff + +# CHECK: cvd %r15, 0 +0x4e 0xf0 0x00 0x00 + +# CHECK: cvdg %r0, -524288 +0xe3 0x00 0x00 0x00 0x80 0x2e + +# CHECK: cvdg %r0, -1 +0xe3 0x00 0x0f 0xff 0xff 0x2e + +# CHECK: cvdg %r0, 0 +0xe3 0x00 0x00 0x00 0x00 0x2e + +# CHECK: cvdg %r0, 1 +0xe3 0x00 0x00 0x01 0x00 0x2e + +# CHECK: cvdg %r0, 524287 +0xe3 0x00 0x0f 0xff 0x7f 0x2e + +# CHECK: cvdg %r0, 0(%r1) +0xe3 0x00 0x10 0x00 0x00 0x2e + +# CHECK: cvdg %r0, 0(%r15) +0xe3 0x00 0xf0 0x00 0x00 0x2e + +# CHECK: cvdg %r0, 524287(%r1,%r15) +0xe3 0x01 0xff 0xff 0x7f 0x2e + +# CHECK: cvdg %r0, 524287(%r15,%r1) +0xe3 0x0f 0x1f 0xff 0x7f 0x2e + +# CHECK: cvdg %r15, 0 +0xe3 0xf0 0x00 0x00 0x00 0x2e + +# CHECK: cvdy %r0, -524288 +0xe3 0x00 0x00 0x00 0x80 0x26 + +# CHECK: cvdy %r0, -1 +0xe3 0x00 0x0f 0xff 0xff 0x26 + +# CHECK: cvdy %r0, 0 +0xe3 0x00 0x00 0x00 0x00 0x26 + +# CHECK: cvdy %r0, 1 +0xe3 0x00 0x00 0x01 0x00 0x26 + +# CHECK: cvdy %r0, 524287 +0xe3 0x00 0x0f 0xff 0x7f 0x26 + +# CHECK: cvdy %r0, 0(%r1) +0xe3 0x00 0x10 0x00 0x00 0x26 + +# CHECK: cvdy %r0, 0(%r15) +0xe3 0x00 0xf0 0x00 0x00 0x26 + +# CHECK: cvdy %r0, 524287(%r1,%r15) +0xe3 0x01 0xff 0xff 0x7f 0x26 + +# CHECK: cvdy %r0, 524287(%r15,%r1) +0xe3 0x0f 0x1f 0xff 0x7f 0x26 + +# CHECK: cvdy %r15, 0 +0xe3 0xf0 0x00 0x00 0x00 0x26 + # CHECK: cxbr %f0, %f0 0xb3 0x49 0x00 0x00 @@ -4048,6 +4294,48 @@ # CHECK: dlr %r6, %r9 0xb9 0x97 0x00 0x69 +# CHECK: dp 0(1), 0(1) +0xfd 0x00 0x00 0x00 0x00 0x00 + +# CHECK: dp 0(1), 0(1,%r1) +0xfd 0x00 0x00 0x00 0x10 0x00 + +# CHECK: dp 0(1), 0(1,%r15) +0xfd 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: dp 0(1), 4095(1) +0xfd 0x00 0x00 0x00 0x0f 0xff + +# CHECK: dp 0(1), 4095(1,%r1) +0xfd 0x00 0x00 0x00 0x1f 0xff + +# CHECK: dp 0(1), 4095(1,%r15) +0xfd 0x00 0x00 0x00 0xff 0xff + +# CHECK: dp 0(1,%r1), 0(1) +0xfd 0x00 0x10 0x00 0x00 0x00 + +# CHECK: dp 0(1,%r15), 0(1) +0xfd 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: dp 4095(1,%r1), 0(1) +0xfd 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: dp 4095(1,%r15), 0(1) +0xfd 0x00 0xff 0xff 0x00 0x00 + +# CHECK: dp 0(16,%r1), 0(1) +0xfd 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: dp 0(16,%r15), 0(1) +0xfd 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: dp 0(1), 0(16,%r1) +0xfd 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: dp 0(1), 0(16,%r15) +0xfd 0x0f 0x00 0x00 0xf0 0x00 + # CHECK: dsg %r0, -524288 0xe3 0x00 0x00 0x00 0x80 0x0d @@ -4180,6 +4468,78 @@ # CHECK: ectg 4095(%r1), 0(%r15), %r2 0xc8 0x21 0x1f 0xff 0xf0 0x00 +# CHECK: ed 0(1), 0 +0xde 0x00 0x00 0x00 0x00 0x00 + +# CHECK: ed 0(1), 0(%r1) +0xde 0x00 0x00 0x00 0x10 0x00 + +# CHECK: ed 0(1), 0(%r15) +0xde 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: ed 0(1), 4095 +0xde 0x00 0x00 0x00 0x0f 0xff + +# CHECK: ed 0(1), 4095(%r1) +0xde 0x00 0x00 0x00 0x1f 0xff + +# CHECK: ed 0(1), 4095(%r15) +0xde 0x00 0x00 0x00 0xff 0xff + +# CHECK: ed 0(1,%r1), 0 +0xde 0x00 0x10 0x00 0x00 0x00 + +# CHECK: ed 0(1,%r15), 0 +0xde 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: ed 4095(1,%r1), 0 +0xde 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: ed 4095(1,%r15), 0 +0xde 0x00 0xff 0xff 0x00 0x00 + +# CHECK: ed 0(256,%r1), 0 +0xde 0xff 0x10 0x00 0x00 0x00 + +# CHECK: ed 0(256,%r15), 0 +0xde 0xff 0xf0 0x00 0x00 0x00 + +# CHECK: edmk 0(1), 0 +0xdf 0x00 0x00 0x00 0x00 0x00 + +# CHECK: edmk 0(1), 0(%r1) +0xdf 0x00 0x00 0x00 0x10 0x00 + +# CHECK: edmk 0(1), 0(%r15) +0xdf 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: edmk 0(1), 4095 +0xdf 0x00 0x00 0x00 0x0f 0xff + +# CHECK: edmk 0(1), 4095(%r1) +0xdf 0x00 0x00 0x00 0x1f 0xff + +# CHECK: edmk 0(1), 4095(%r15) +0xdf 0x00 0x00 0x00 0xff 0xff + +# CHECK: edmk 0(1,%r1), 0 +0xdf 0x00 0x10 0x00 0x00 0x00 + +# CHECK: edmk 0(1,%r15), 0 +0xdf 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: edmk 4095(1,%r1), 0 +0xdf 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: edmk 4095(1,%r15), 0 +0xdf 0x00 0xff 0xff 0x00 0x00 + +# CHECK: edmk 0(256,%r1), 0 +0xdf 0xff 0x10 0x00 0x00 0x00 + +# CHECK: edmk 0(256,%r15), 0 +0xdf 0xff 0xf0 0x00 0x00 0x00 + # CHECK: efpc %r0 0xb3 0x8c 0x00 0x00 @@ -7696,6 +8056,48 @@ # CHECK: mlgr %r6, %r9 0xb9 0x86 0x00 0x69 +# CHECK: mp 0(1), 0(1) +0xfc 0x00 0x00 0x00 0x00 0x00 + +# CHECK: mp 0(1), 0(1,%r1) +0xfc 0x00 0x00 0x00 0x10 0x00 + +# CHECK: mp 0(1), 0(1,%r15) +0xfc 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: mp 0(1), 4095(1) +0xfc 0x00 0x00 0x00 0x0f 0xff + +# CHECK: mp 0(1), 4095(1,%r1) +0xfc 0x00 0x00 0x00 0x1f 0xff + +# CHECK: mp 0(1), 4095(1,%r15) +0xfc 0x00 0x00 0x00 0xff 0xff + +# CHECK: mp 0(1,%r1), 0(1) +0xfc 0x00 0x10 0x00 0x00 0x00 + +# CHECK: mp 0(1,%r15), 0(1) +0xfc 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: mp 4095(1,%r1), 0(1) +0xfc 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: mp 4095(1,%r15), 0(1) +0xfc 0x00 0xff 0xff 0x00 0x00 + +# CHECK: mp 0(16,%r1), 0(1) +0xfc 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: mp 0(16,%r15), 0(1) +0xfc 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: mp 0(1), 0(16,%r1) +0xfc 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: mp 0(1), 0(16,%r15) +0xfc 0x0f 0x00 0x00 0xf0 0x00 + # CHECK: ms %r0, 0 0x71 0x00 0x00 0x00 @@ -8275,6 +8677,84 @@ # CHECK: mviy 524287(%r15), 42 0xeb 0x2a 0xff 0xff 0x7f 0x52 +# CHECK: mvn 0(1), 0 +0xd1 0x00 0x00 0x00 0x00 0x00 + +# CHECK: mvn 0(1), 0(%r1) +0xd1 0x00 0x00 0x00 0x10 0x00 + +# CHECK: mvn 0(1), 0(%r15) +0xd1 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: mvn 0(1), 4095 +0xd1 0x00 0x00 0x00 0x0f 0xff + +# CHECK: mvn 0(1), 4095(%r1) +0xd1 0x00 0x00 0x00 0x1f 0xff + +# CHECK: mvn 0(1), 4095(%r15) +0xd1 0x00 0x00 0x00 0xff 0xff + +# CHECK: mvn 0(1,%r1), 0 +0xd1 0x00 0x10 0x00 0x00 0x00 + +# CHECK: mvn 0(1,%r15), 0 +0xd1 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: mvn 4095(1,%r1), 0 +0xd1 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: mvn 4095(1,%r15), 0 +0xd1 0x00 0xff 0xff 0x00 0x00 + +# CHECK: mvn 0(256,%r1), 0 +0xd1 0xff 0x10 0x00 0x00 0x00 + +# CHECK: mvn 0(256,%r15), 0 +0xd1 0xff 0xf0 0x00 0x00 0x00 + +# CHECK: mvo 0(1), 0(1) +0xf1 0x00 0x00 0x00 0x00 0x00 + +# CHECK: mvo 0(1), 0(1,%r1) +0xf1 0x00 0x00 0x00 0x10 0x00 + +# CHECK: mvo 0(1), 0(1,%r15) +0xf1 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: mvo 0(1), 4095(1) +0xf1 0x00 0x00 0x00 0x0f 0xff + +# CHECK: mvo 0(1), 4095(1,%r1) +0xf1 0x00 0x00 0x00 0x1f 0xff + +# CHECK: mvo 0(1), 4095(1,%r15) +0xf1 0x00 0x00 0x00 0xff 0xff + +# CHECK: mvo 0(1,%r1), 0(1) +0xf1 0x00 0x10 0x00 0x00 0x00 + +# CHECK: mvo 0(1,%r15), 0(1) +0xf1 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: mvo 4095(1,%r1), 0(1) +0xf1 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: mvo 4095(1,%r15), 0(1) +0xf1 0x00 0xff 0xff 0x00 0x00 + +# CHECK: mvo 0(16,%r1), 0(1) +0xf1 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: mvo 0(16,%r15), 0(1) +0xf1 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: mvo 0(1), 0(16,%r1) +0xf1 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: mvo 0(1), 0(16,%r15) +0xf1 0x0f 0x00 0x00 0xf0 0x00 + # CHECK: mvst %r0, %r0 0xb2 0x55 0x00 0x00 @@ -8287,6 +8767,42 @@ # CHECK: mvst %r7, %r8 0xb2 0x55 0x00 0x78 +# CHECK: mvz 0(1), 0 +0xd3 0x00 0x00 0x00 0x00 0x00 + +# CHECK: mvz 0(1), 0(%r1) +0xd3 0x00 0x00 0x00 0x10 0x00 + +# CHECK: mvz 0(1), 0(%r15) +0xd3 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: mvz 0(1), 4095 +0xd3 0x00 0x00 0x00 0x0f 0xff + +# CHECK: mvz 0(1), 4095(%r1) +0xd3 0x00 0x00 0x00 0x1f 0xff + +# CHECK: mvz 0(1), 4095(%r15) +0xd3 0x00 0x00 0x00 0xff 0xff + +# CHECK: mvz 0(1,%r1), 0 +0xd3 0x00 0x10 0x00 0x00 0x00 + +# CHECK: mvz 0(1,%r15), 0 +0xd3 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: mvz 4095(1,%r1), 0 +0xd3 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: mvz 4095(1,%r15), 0 +0xd3 0x00 0xff 0xff 0x00 0x00 + +# CHECK: mvz 0(256,%r1), 0 +0xd3 0xff 0x10 0x00 0x00 0x00 + +# CHECK: mvz 0(256,%r15), 0 +0xd3 0xff 0xf0 0x00 0x00 0x00 + # CHECK: mxbr %f0, %f0 0xb3 0x4c 0x00 0x00 @@ -8914,6 +9430,48 @@ # CHECK: oy %r15, 0 0xe3 0xf0 0x00 0x00 0x00 0x56 +# CHECK: pack 0(1), 0(1) +0xf2 0x00 0x00 0x00 0x00 0x00 + +# CHECK: pack 0(1), 0(1,%r1) +0xf2 0x00 0x00 0x00 0x10 0x00 + +# CHECK: pack 0(1), 0(1,%r15) +0xf2 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: pack 0(1), 4095(1) +0xf2 0x00 0x00 0x00 0x0f 0xff + +# CHECK: pack 0(1), 4095(1,%r1) +0xf2 0x00 0x00 0x00 0x1f 0xff + +# CHECK: pack 0(1), 4095(1,%r15) +0xf2 0x00 0x00 0x00 0xff 0xff + +# CHECK: pack 0(1,%r1), 0(1) +0xf2 0x00 0x10 0x00 0x00 0x00 + +# CHECK: pack 0(1,%r15), 0(1) +0xf2 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: pack 4095(1,%r1), 0(1) +0xf2 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: pack 4095(1,%r15), 0(1) +0xf2 0x00 0xff 0xff 0x00 0x00 + +# CHECK: pack 0(16,%r1), 0(1) +0xf2 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: pack 0(16,%r15), 0(1) +0xf2 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: pack 0(1), 0(16,%r1) +0xf2 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: pack 0(1), 0(16,%r15) +0xf2 0x0f 0x00 0x00 0xf0 0x00 + # CHECK: pcc 0xb9 0x2c 0x00 0x00 @@ -8947,6 +9505,78 @@ # CHECK: pfd 15, 0 0xe3 0xf0 0x00 0x00 0x00 0x36 +# CHECK: pka 0, 0(1) +0xe9 0x00 0x00 0x00 0x00 0x00 + +# CHECK: pka 0, 0(1,%r1) +0xe9 0x00 0x00 0x00 0x10 0x00 + +# CHECK: pka 0, 0(1,%r15) +0xe9 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: pka 0, 4095(1) +0xe9 0x00 0x00 0x00 0x0f 0xff + +# CHECK: pka 0, 4095(1,%r1) +0xe9 0x00 0x00 0x00 0x1f 0xff + +# CHECK: pka 0, 4095(1,%r15) +0xe9 0x00 0x00 0x00 0xff 0xff + +# CHECK: pka 0(%r1), 0(1) +0xe9 0x00 0x10 0x00 0x00 0x00 + +# CHECK: pka 0(%r15), 0(1) +0xe9 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: pka 4095(%r1), 0(1) +0xe9 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: pka 4095(%r15), 0(1) +0xe9 0x00 0xff 0xff 0x00 0x00 + +# CHECK: pka 0, 0(256,%r1) +0xe9 0xff 0x00 0x00 0x10 0x00 + +# CHECK: pka 0, 0(256,%r15) +0xe9 0xff 0x00 0x00 0xf0 0x00 + +# CHECK: pku 0, 0(1) +0xe1 0x00 0x00 0x00 0x00 0x00 + +# CHECK: pku 0, 0(1,%r1) +0xe1 0x00 0x00 0x00 0x10 0x00 + +# CHECK: pku 0, 0(1,%r15) +0xe1 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: pku 0, 4095(1) +0xe1 0x00 0x00 0x00 0x0f 0xff + +# CHECK: pku 0, 4095(1,%r1) +0xe1 0x00 0x00 0x00 0x1f 0xff + +# CHECK: pku 0, 4095(1,%r15) +0xe1 0x00 0x00 0x00 0xff 0xff + +# CHECK: pku 0(%r1), 0(1) +0xe1 0x00 0x10 0x00 0x00 0x00 + +# CHECK: pku 0(%r15), 0(1) +0xe1 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: pku 4095(%r1), 0(1) +0xe1 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: pku 4095(%r15), 0(1) +0xe1 0x00 0xff 0xff 0x00 0x00 + +# CHECK: pku 0, 0(256,%r1) +0xe1 0xff 0x00 0x00 0x10 0x00 + +# CHECK: pku 0, 0(256,%r15) +0xe1 0xff 0x00 0x00 0xf0 0x00 + # CHECK: plo %r0, 0, %r0, 0 0xee 0x00 0x00 0x00 0x00 0x00 @@ -9904,6 +10534,48 @@ # CHECK: sly %r15, 0 0xe3 0xf0 0x00 0x00 0x00 0x5f +# CHECK: sp 0(1), 0(1) +0xfb 0x00 0x00 0x00 0x00 0x00 + +# CHECK: sp 0(1), 0(1,%r1) +0xfb 0x00 0x00 0x00 0x10 0x00 + +# CHECK: sp 0(1), 0(1,%r15) +0xfb 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: sp 0(1), 4095(1) +0xfb 0x00 0x00 0x00 0x0f 0xff + +# CHECK: sp 0(1), 4095(1,%r1) +0xfb 0x00 0x00 0x00 0x1f 0xff + +# CHECK: sp 0(1), 4095(1,%r15) +0xfb 0x00 0x00 0x00 0xff 0xff + +# CHECK: sp 0(1,%r1), 0(1) +0xfb 0x00 0x10 0x00 0x00 0x00 + +# CHECK: sp 0(1,%r15), 0(1) +0xfb 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: sp 4095(1,%r1), 0(1) +0xfb 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: sp 4095(1,%r15), 0(1) +0xfb 0x00 0xff 0xff 0x00 0x00 + +# CHECK: sp 0(16,%r1), 0(1) +0xfb 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: sp 0(16,%r15), 0(1) +0xfb 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: sp 0(1), 0(16,%r1) +0xfb 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: sp 0(1), 0(16,%r15) +0xfb 0x0f 0x00 0x00 0xf0 0x00 + # CHECK: spm %r0 0x04 0x00 @@ -10255,6 +10927,45 @@ # CHECK: srnmt 4095(%r15) 0xb2 0xb9 0xff 0xff +# CHECK: srp 0(1), 0, 0 +0xf0 0x00 0x00 0x00 0x00 0x00 + +# CHECK: srp 0(1), 0, 15 +0xf0 0x0f 0x00 0x00 0x00 0x00 + +# CHECK: srp 0(1), 0(%r1), 0 +0xf0 0x00 0x00 0x00 0x10 0x00 + +# CHECK: srp 0(1), 0(%r15), 0 +0xf0 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: srp 0(1), 4095, 0 +0xf0 0x00 0x00 0x00 0x0f 0xff + +# CHECK: srp 0(1), 4095(%r1), 0 +0xf0 0x00 0x00 0x00 0x1f 0xff + +# CHECK: srp 0(1), 4095(%r15), 0 +0xf0 0x00 0x00 0x00 0xff 0xff + +# CHECK: srp 0(1,%r1), 0, 0 +0xf0 0x00 0x10 0x00 0x00 0x00 + +# CHECK: srp 0(1,%r15), 0, 0 +0xf0 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: srp 4095(1,%r1), 0, 0 +0xf0 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: srp 4095(1,%r15), 0, 0 +0xf0 0x00 0xff 0xff 0x00 0x00 + +# CHECK: srp 0(16,%r1), 0, 0 +0xf0 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: srp 0(16,%r15), 0, 0 +0xf0 0xf0 0xf0 0x00 0x00 0x00 + # CHECK: srst %r0, %r0 0xb2 0x5e 0x00 0x00 @@ -11500,6 +12211,27 @@ # CHECK: tmy 524287(%r15), 42 0xeb 0x2a 0xff 0xff 0x7f 0x51 +# CHECK: tp 0(1) +0xeb 0x00 0x00 0x00 0x00 0xc0 + +# CHECK: tp 0(1,%r1) +0xeb 0x00 0x10 0x00 0x00 0xc0 + +# CHECK: tp 0(1,%r15) +0xeb 0x00 0xf0 0x00 0x00 0xc0 + +# CHECK: tp 4095(1,%r1) +0xeb 0x00 0x1f 0xff 0x00 0xc0 + +# CHECK: tp 4095(1,%r15) +0xeb 0x00 0xff 0xff 0x00 0xc0 + +# CHECK: tp 0(16,%r1) +0xeb 0xf0 0x10 0x00 0x00 0xc0 + +# CHECK: tp 0(16,%r15) +0xeb 0xf0 0xf0 0x00 0x00 0xc0 + # CHECK: tr 0(1), 0 0xdc 0x00 0x00 0x00 0x00 0x00 @@ -11746,6 +12478,120 @@ # CHECK: ts 4095(%r15) 0x93 0x00 0xff 0xff +# CHECK: unpk 0(1), 0(1) +0xf3 0x00 0x00 0x00 0x00 0x00 + +# CHECK: unpk 0(1), 0(1,%r1) +0xf3 0x00 0x00 0x00 0x10 0x00 + +# CHECK: unpk 0(1), 0(1,%r15) +0xf3 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: unpk 0(1), 4095(1) +0xf3 0x00 0x00 0x00 0x0f 0xff + +# CHECK: unpk 0(1), 4095(1,%r1) +0xf3 0x00 0x00 0x00 0x1f 0xff + +# CHECK: unpk 0(1), 4095(1,%r15) +0xf3 0x00 0x00 0x00 0xff 0xff + +# CHECK: unpk 0(1,%r1), 0(1) +0xf3 0x00 0x10 0x00 0x00 0x00 + +# CHECK: unpk 0(1,%r15), 0(1) +0xf3 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: unpk 4095(1,%r1), 0(1) +0xf3 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: unpk 4095(1,%r15), 0(1) +0xf3 0x00 0xff 0xff 0x00 0x00 + +# CHECK: unpk 0(16,%r1), 0(1) +0xf3 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: unpk 0(16,%r15), 0(1) +0xf3 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: unpk 0(1), 0(16,%r1) +0xf3 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: unpk 0(1), 0(16,%r15) +0xf3 0x0f 0x00 0x00 0xf0 0x00 + +# CHECK: unpka 0(1), 0 +0xea 0x00 0x00 0x00 0x00 0x00 + +# CHECK: unpka 0(1), 0(%r1) +0xea 0x00 0x00 0x00 0x10 0x00 + +# CHECK: unpka 0(1), 0(%r15) +0xea 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: unpka 0(1), 4095 +0xea 0x00 0x00 0x00 0x0f 0xff + +# CHECK: unpka 0(1), 4095(%r1) +0xea 0x00 0x00 0x00 0x1f 0xff + +# CHECK: unpka 0(1), 4095(%r15) +0xea 0x00 0x00 0x00 0xff 0xff + +# CHECK: unpka 0(1,%r1), 0 +0xea 0x00 0x10 0x00 0x00 0x00 + +# CHECK: unpka 0(1,%r15), 0 +0xea 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: unpka 4095(1,%r1), 0 +0xea 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: unpka 4095(1,%r15), 0 +0xea 0x00 0xff 0xff 0x00 0x00 + +# CHECK: unpka 0(256,%r1), 0 +0xea 0xff 0x10 0x00 0x00 0x00 + +# CHECK: unpka 0(256,%r15), 0 +0xea 0xff 0xf0 0x00 0x00 0x00 + +# CHECK: unpku 0(1), 0 +0xe2 0x00 0x00 0x00 0x00 0x00 + +# CHECK: unpku 0(1), 0(%r1) +0xe2 0x00 0x00 0x00 0x10 0x00 + +# CHECK: unpku 0(1), 0(%r15) +0xe2 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: unpku 0(1), 4095 +0xe2 0x00 0x00 0x00 0x0f 0xff + +# CHECK: unpku 0(1), 4095(%r1) +0xe2 0x00 0x00 0x00 0x1f 0xff + +# CHECK: unpku 0(1), 4095(%r15) +0xe2 0x00 0x00 0x00 0xff 0xff + +# CHECK: unpku 0(1,%r1), 0 +0xe2 0x00 0x10 0x00 0x00 0x00 + +# CHECK: unpku 0(1,%r15), 0 +0xe2 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: unpku 4095(1,%r1), 0 +0xe2 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: unpku 4095(1,%r15), 0 +0xe2 0x00 0xff 0xff 0x00 0x00 + +# CHECK: unpku 0(256,%r1), 0 +0xe2 0xff 0x10 0x00 0x00 0x00 + +# CHECK: unpku 0(256,%r15), 0 +0xe2 0xff 0xf0 0x00 0x00 0x00 + # CHECK: x %r0, 0 0x57 0x00 0x00 0x00 @@ -11967,3 +12813,45 @@ # CHECK: xy %r15, 0 0xe3 0xf0 0x00 0x00 0x00 0x57 + +# CHECK: zap 0(1), 0(1) +0xf8 0x00 0x00 0x00 0x00 0x00 + +# CHECK: zap 0(1), 0(1,%r1) +0xf8 0x00 0x00 0x00 0x10 0x00 + +# CHECK: zap 0(1), 0(1,%r15) +0xf8 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: zap 0(1), 4095(1) +0xf8 0x00 0x00 0x00 0x0f 0xff + +# CHECK: zap 0(1), 4095(1,%r1) +0xf8 0x00 0x00 0x00 0x1f 0xff + +# CHECK: zap 0(1), 4095(1,%r15) +0xf8 0x00 0x00 0x00 0xff 0xff + +# CHECK: zap 0(1,%r1), 0(1) +0xf8 0x00 0x10 0x00 0x00 0x00 + +# CHECK: zap 0(1,%r15), 0(1) +0xf8 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: zap 4095(1,%r1), 0(1) +0xf8 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: zap 4095(1,%r15), 0(1) +0xf8 0x00 0xff 0xff 0x00 0x00 + +# CHECK: zap 0(16,%r1), 0(1) +0xf8 0xf0 0x10 0x00 0x00 0x00 + +# CHECK: zap 0(16,%r15), 0(1) +0xf8 0xf0 0xf0 0x00 0x00 0x00 + +# CHECK: zap 0(1), 0(16,%r1) +0xf8 0x0f 0x00 0x00 0x10 0x00 + +# CHECK: zap 0(1), 0(16,%r15) +0xf8 0x0f 0x00 0x00 0xf0 0x00 diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s index 607246ae25d..6616f278318 100644 --- a/test/MC/SystemZ/insn-bad.s +++ b/test/MC/SystemZ/insn-bad.s @@ -219,6 +219,59 @@ aly %r0, -524289 aly %r0, 524288 +#CHECK: error: missing length in address +#CHECK: ap 0, 0(1) +#CHECK: error: missing length in address +#CHECK: ap 0(1), 0 +#CHECK: error: missing length in address +#CHECK: ap 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: ap 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: ap 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: ap 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: ap 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: ap 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: ap -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: ap 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: ap 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: ap 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: ap 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: ap 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: ap 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: ap 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: ap 0(-), 0(1) + + ap 0, 0(1) + ap 0(1), 0 + ap 0(%r1), 0(1,%r1) + ap 0(1,%r1), 0(%r1) + ap 0(0,%r1), 0(1,%r1) + ap 0(1,%r1), 0(0,%r1) + ap 0(17,%r1), 0(1,%r1) + ap 0(1,%r1), 0(17,%r1) + ap -1(1,%r1), 0(1,%r1) + ap 4096(1,%r1), 0(1,%r1) + ap 0(1,%r1), -1(1,%r1) + ap 0(1,%r1), 4096(1,%r1) + ap 0(1,%r0), 0(1,%r1) + ap 0(1,%r1), 0(1,%r0) + ap 0(%r1,%r2), 0(1,%r1) + ap 0(1,%r2), 0(%r1,%r2) + ap 0(-), 0(1) + #CHECK: error: instruction requires: distinct-ops #CHECK: ark %r2,%r3,%r4 @@ -1492,6 +1545,59 @@ cly %r0, -524289 cly %r0, 524288 +#CHECK: error: missing length in address +#CHECK: cp 0, 0(1) +#CHECK: error: missing length in address +#CHECK: cp 0(1), 0 +#CHECK: error: missing length in address +#CHECK: cp 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: cp 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: cp 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: cp 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: cp 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: cp 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: cp -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: cp 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: cp 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: cp 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: cp 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: cp 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: cp 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: cp 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: cp 0(-), 0(1) + + cp 0, 0(1) + cp 0(1), 0 + cp 0(%r1), 0(1,%r1) + cp 0(1,%r1), 0(%r1) + cp 0(0,%r1), 0(1,%r1) + cp 0(1,%r1), 0(0,%r1) + cp 0(17,%r1), 0(1,%r1) + cp 0(1,%r1), 0(17,%r1) + cp -1(1,%r1), 0(1,%r1) + cp 4096(1,%r1), 0(1,%r1) + cp 0(1,%r1), -1(1,%r1) + cp 0(1,%r1), 4096(1,%r1) + cp 0(1,%r0), 0(1,%r1) + cp 0(1,%r1), 0(1,%r0) + cp 0(%r1,%r2), 0(1,%r1) + cp 0(1,%r2), 0(%r1,%r2) + cp 0(-), 0(1) + #CHECK: error: offset out of range #CHECK: crj %r0, %r0, 0, -0x100002 #CHECK: error: offset out of range @@ -1694,6 +1800,54 @@ cuutf %r2, %r4, -1 cuutf %r2, %r4, 16 +#CHECK: error: invalid operand +#CHECK: cvb %r0, -1 +#CHECK: error: invalid operand +#CHECK: cvb %r0, 4096 + + cvb %r0, -1 + cvb %r0, 4096 + +#CHECK: error: invalid operand +#CHECK: cvbg %r0, -524289 +#CHECK: error: invalid operand +#CHECK: cvbg %r0, 524288 + + cvbg %r0, -524289 + cvbg %r0, 524288 + +#CHECK: error: invalid operand +#CHECK: cvby %r0, -524289 +#CHECK: error: invalid operand +#CHECK: cvby %r0, 524288 + + cvby %r0, -524289 + cvby %r0, 524288 + +#CHECK: error: invalid operand +#CHECK: cvd %r0, -1 +#CHECK: error: invalid operand +#CHECK: cvd %r0, 4096 + + cvd %r0, -1 + cvd %r0, 4096 + +#CHECK: error: invalid operand +#CHECK: cvdg %r0, -524289 +#CHECK: error: invalid operand +#CHECK: cvdg %r0, 524288 + + cvdg %r0, -524289 + cvdg %r0, 524288 + +#CHECK: error: invalid operand +#CHECK: cvdy %r0, -524289 +#CHECK: error: invalid operand +#CHECK: cvdy %r0, 524288 + + cvdy %r0, -524289 + cvdy %r0, 524288 + #CHECK: error: invalid register pair #CHECK: cxbr %f0, %f2 #CHECK: error: invalid register pair @@ -1788,6 +1942,59 @@ dlr %r1, %r0 +#CHECK: error: missing length in address +#CHECK: dp 0, 0(1) +#CHECK: error: missing length in address +#CHECK: dp 0(1), 0 +#CHECK: error: missing length in address +#CHECK: dp 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: dp 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: dp 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: dp 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: dp 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: dp 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: dp -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: dp 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: dp 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: dp 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: dp 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: dp 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: dp 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: dp 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: dp 0(-), 0(1) + + dp 0, 0(1) + dp 0(1), 0 + dp 0(%r1), 0(1,%r1) + dp 0(1,%r1), 0(%r1) + dp 0(0,%r1), 0(1,%r1) + dp 0(1,%r1), 0(0,%r1) + dp 0(17,%r1), 0(1,%r1) + dp 0(1,%r1), 0(17,%r1) + dp -1(1,%r1), 0(1,%r1) + dp 4096(1,%r1), 0(1,%r1) + dp 0(1,%r1), -1(1,%r1) + dp 0(1,%r1), 4096(1,%r1) + dp 0(1,%r0), 0(1,%r1) + dp 0(1,%r1), 0(1,%r0) + dp 0(%r1,%r2), 0(1,%r1) + dp 0(1,%r2), 0(%r1,%r2) + dp 0(-), 0(1) + #CHECK: error: invalid operand #CHECK: dsg %r0, -524289 #CHECK: error: invalid operand @@ -1845,6 +2052,94 @@ ectg 0(%r1),-1(%r15), %r2 ectg 0(%r1),4096(%r15), %r2 +#CHECK: error: missing length in address +#CHECK: ed 0, 0 +#CHECK: error: missing length in address +#CHECK: ed 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: ed 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: ed 0(0,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: ed 0(257,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: ed -1(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: ed 4096(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: ed 0(1,%r1), -1(%r1) +#CHECK: error: invalid operand +#CHECK: ed 0(1,%r1), 4096(%r1) +#CHECK: error: %r0 used in an address +#CHECK: ed 0(1,%r0), 0(%r1) +#CHECK: error: %r0 used in an address +#CHECK: ed 0(1,%r1), 0(%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: ed 0(%r1,%r2), 0(%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: ed 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: ed 0(-), 0 + + ed 0, 0 + ed 0(%r1), 0(%r1) + ed 0(1,%r1), 0(2,%r1) + ed 0(0,%r1), 0(%r1) + ed 0(257,%r1), 0(%r1) + ed -1(1,%r1), 0(%r1) + ed 4096(1,%r1), 0(%r1) + ed 0(1,%r1), -1(%r1) + ed 0(1,%r1), 4096(%r1) + ed 0(1,%r0), 0(%r1) + ed 0(1,%r1), 0(%r0) + ed 0(%r1,%r2), 0(%r1) + ed 0(1,%r2), 0(%r1,%r2) + ed 0(-), 0 + +#CHECK: error: missing length in address +#CHECK: edmk 0, 0 +#CHECK: error: missing length in address +#CHECK: edmk 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: edmk 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: edmk 0(0,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: edmk 0(257,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: edmk -1(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: edmk 4096(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: edmk 0(1,%r1), -1(%r1) +#CHECK: error: invalid operand +#CHECK: edmk 0(1,%r1), 4096(%r1) +#CHECK: error: %r0 used in an address +#CHECK: edmk 0(1,%r0), 0(%r1) +#CHECK: error: %r0 used in an address +#CHECK: edmk 0(1,%r1), 0(%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: edmk 0(%r1,%r2), 0(%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: edmk 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: edmk 0(-), 0 + + edmk 0, 0 + edmk 0(%r1), 0(%r1) + edmk 0(1,%r1), 0(2,%r1) + edmk 0(0,%r1), 0(%r1) + edmk 0(257,%r1), 0(%r1) + edmk -1(1,%r1), 0(%r1) + edmk 4096(1,%r1), 0(%r1) + edmk 0(1,%r1), -1(%r1) + edmk 0(1,%r1), 4096(%r1) + edmk 0(1,%r0), 0(%r1) + edmk 0(1,%r1), 0(%r0) + edmk 0(%r1,%r2), 0(%r1) + edmk 0(1,%r2), 0(%r1,%r2) + edmk 0(-), 0 + #CHECK: error: invalid operand #CHECK: ex %r0, -1 #CHECK: error: invalid operand @@ -2827,6 +3122,59 @@ mlgr %r1, %r0 +#CHECK: error: missing length in address +#CHECK: mp 0, 0(1) +#CHECK: error: missing length in address +#CHECK: mp 0(1), 0 +#CHECK: error: missing length in address +#CHECK: mp 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: mp 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mp 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: mp 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: mp 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: mp 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: mp -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: mp 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: mp 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: mp 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: mp 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: mp 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: mp 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: mp 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: mp 0(-), 0(1) + + mp 0, 0(1) + mp 0(1), 0 + mp 0(%r1), 0(1,%r1) + mp 0(1,%r1), 0(%r1) + mp 0(0,%r1), 0(1,%r1) + mp 0(1,%r1), 0(0,%r1) + mp 0(17,%r1), 0(1,%r1) + mp 0(1,%r1), 0(17,%r1) + mp -1(1,%r1), 0(1,%r1) + mp 4096(1,%r1), 0(1,%r1) + mp 0(1,%r1), -1(1,%r1) + mp 0(1,%r1), 4096(1,%r1) + mp 0(1,%r0), 0(1,%r1) + mp 0(1,%r1), 0(1,%r0) + mp 0(%r1,%r2), 0(1,%r1) + mp 0(1,%r2), 0(%r1,%r2) + mp 0(-), 0(1) + #CHECK: error: invalid operand #CHECK: ms %r0, -1 #CHECK: error: invalid operand @@ -3129,6 +3477,147 @@ mviy 0, -1 mviy 0, 256 +#CHECK: error: missing length in address +#CHECK: mvn 0, 0 +#CHECK: error: missing length in address +#CHECK: mvn 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: mvn 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: mvn 0(0,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvn 0(257,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvn -1(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvn 4096(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvn 0(1,%r1), -1(%r1) +#CHECK: error: invalid operand +#CHECK: mvn 0(1,%r1), 4096(%r1) +#CHECK: error: %r0 used in an address +#CHECK: mvn 0(1,%r0), 0(%r1) +#CHECK: error: %r0 used in an address +#CHECK: mvn 0(1,%r1), 0(%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: mvn 0(%r1,%r2), 0(%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: mvn 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: mvn 0(-), 0 + + mvn 0, 0 + mvn 0(%r1), 0(%r1) + mvn 0(1,%r1), 0(2,%r1) + mvn 0(0,%r1), 0(%r1) + mvn 0(257,%r1), 0(%r1) + mvn -1(1,%r1), 0(%r1) + mvn 4096(1,%r1), 0(%r1) + mvn 0(1,%r1), -1(%r1) + mvn 0(1,%r1), 4096(%r1) + mvn 0(1,%r0), 0(%r1) + mvn 0(1,%r1), 0(%r0) + mvn 0(%r1,%r2), 0(%r1) + mvn 0(1,%r2), 0(%r1,%r2) + mvn 0(-), 0 + +#CHECK: error: missing length in address +#CHECK: mvo 0, 0(1) +#CHECK: error: missing length in address +#CHECK: mvo 0(1), 0 +#CHECK: error: missing length in address +#CHECK: mvo 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: mvo 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvo 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: mvo 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: mvo 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: mvo 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: mvo -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: mvo 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: mvo 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: mvo 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: mvo 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: mvo 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: mvo 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: mvo 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: mvo 0(-), 0(1) + + mvo 0, 0(1) + mvo 0(1), 0 + mvo 0(%r1), 0(1,%r1) + mvo 0(1,%r1), 0(%r1) + mvo 0(0,%r1), 0(1,%r1) + mvo 0(1,%r1), 0(0,%r1) + mvo 0(17,%r1), 0(1,%r1) + mvo 0(1,%r1), 0(17,%r1) + mvo -1(1,%r1), 0(1,%r1) + mvo 4096(1,%r1), 0(1,%r1) + mvo 0(1,%r1), -1(1,%r1) + mvo 0(1,%r1), 4096(1,%r1) + mvo 0(1,%r0), 0(1,%r1) + mvo 0(1,%r1), 0(1,%r0) + mvo 0(%r1,%r2), 0(1,%r1) + mvo 0(1,%r2), 0(%r1,%r2) + mvo 0(-), 0(1) + +#CHECK: error: missing length in address +#CHECK: mvz 0, 0 +#CHECK: error: missing length in address +#CHECK: mvz 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: mvz 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: mvz 0(0,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvz 0(257,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvz -1(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvz 4096(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvz 0(1,%r1), -1(%r1) +#CHECK: error: invalid operand +#CHECK: mvz 0(1,%r1), 4096(%r1) +#CHECK: error: %r0 used in an address +#CHECK: mvz 0(1,%r0), 0(%r1) +#CHECK: error: %r0 used in an address +#CHECK: mvz 0(1,%r1), 0(%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: mvz 0(%r1,%r2), 0(%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: mvz 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: mvz 0(-), 0 + + mvz 0, 0 + mvz 0(%r1), 0(%r1) + mvz 0(1,%r1), 0(2,%r1) + mvz 0(0,%r1), 0(%r1) + mvz 0(257,%r1), 0(%r1) + mvz -1(1,%r1), 0(%r1) + mvz 4096(1,%r1), 0(%r1) + mvz 0(1,%r1), -1(%r1) + mvz 0(1,%r1), 4096(%r1) + mvz 0(1,%r0), 0(%r1) + mvz 0(1,%r1), 0(%r0) + mvz 0(%r1,%r2), 0(%r1) + mvz 0(1,%r2), 0(%r1,%r2) + mvz 0(-), 0 + #CHECK: error: invalid register pair #CHECK: mxbr %f0, %f2 #CHECK: error: invalid register pair @@ -3473,6 +3962,59 @@ oy %r0, -524289 oy %r0, 524288 +#CHECK: error: missing length in address +#CHECK: pack 0, 0(1) +#CHECK: error: missing length in address +#CHECK: pack 0(1), 0 +#CHECK: error: missing length in address +#CHECK: pack 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: pack 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: pack 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: pack 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: pack 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: pack 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: pack -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: pack 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: pack 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: pack 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: pack 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: pack 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: pack 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: pack 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: pack 0(-), 0(1) + + pack 0, 0(1) + pack 0(1), 0 + pack 0(%r1), 0(1,%r1) + pack 0(1,%r1), 0(%r1) + pack 0(0,%r1), 0(1,%r1) + pack 0(1,%r1), 0(0,%r1) + pack 0(17,%r1), 0(1,%r1) + pack 0(1,%r1), 0(17,%r1) + pack -1(1,%r1), 0(1,%r1) + pack 4096(1,%r1), 0(1,%r1) + pack 0(1,%r1), -1(1,%r1) + pack 0(1,%r1), 4096(1,%r1) + pack 0(1,%r0), 0(1,%r1) + pack 0(1,%r1), 0(1,%r0) + pack 0(%r1,%r2), 0(1,%r1) + pack 0(1,%r2), 0(%r1,%r2) + pack 0(-), 0(1) + #CHECK: error: instruction requires: message-security-assist-extension4 #CHECK: pcc @@ -3512,6 +4054,94 @@ pfdrl 1, 1 pfdrl 1, 0x100000000 +#CHECK: error: missing length in address +#CHECK: pka 0, 0 +#CHECK: error: missing length in address +#CHECK: pka 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: pka 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: pka 0(%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: pka 0(%r1), 0(257,%r1) +#CHECK: error: invalid operand +#CHECK: pka -1(%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: pka 4096(%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: pka 0(%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: pka 0(%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: pka 0(%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: pka 0(%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: pka 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: pka 0(%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: pka 0, 0(-) + + pka 0, 0 + pka 0(%r1), 0(%r1) + pka 0(1,%r1), 0(2,%r1) + pka 0(%r1), 0(0,%r1) + pka 0(%r1), 0(257,%r1) + pka -1(%r1), 0(1,%r1) + pka 4096(%r1), 0(1,%r1) + pka 0(%r1), -1(1,%r1) + pka 0(%r1), 4096(1,%r1) + pka 0(%r0), 0(1,%r1) + pka 0(%r1), 0(1,%r0) + pka 0(%r1,%r2), 0(1,%r1) + pka 0(%r2), 0(%r1,%r2) + pka 0, 0(-) + +#CHECK: error: missing length in address +#CHECK: pku 0, 0 +#CHECK: error: missing length in address +#CHECK: pku 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: pku 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: pku 0(%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: pku 0(%r1), 0(257,%r1) +#CHECK: error: invalid operand +#CHECK: pku -1(%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: pku 4096(%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: pku 0(%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: pku 0(%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: pku 0(%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: pku 0(%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: pku 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: pku 0(%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: pku 0, 0(-) + + pku 0, 0 + pku 0(%r1), 0(%r1) + pku 0(1,%r1), 0(2,%r1) + pku 0(%r1), 0(0,%r1) + pku 0(%r1), 0(257,%r1) + pku -1(%r1), 0(1,%r1) + pku 4096(%r1), 0(1,%r1) + pku 0(%r1), -1(1,%r1) + pku 0(%r1), 4096(1,%r1) + pku 0(%r0), 0(1,%r1) + pku 0(%r1), 0(1,%r0) + pku 0(%r1,%r2), 0(1,%r1) + pku 0(%r2), 0(%r1,%r2) + pku 0, 0(-) + #CHECK: error: invalid use of indexed addressing #CHECK: plo %r2, 160(%r1,%r15), %r4, 160(%r15) #CHECK: error: invalid operand @@ -3843,6 +4473,59 @@ sly %r0, -524289 sly %r0, 524288 +#CHECK: error: missing length in address +#CHECK: sp 0, 0(1) +#CHECK: error: missing length in address +#CHECK: sp 0(1), 0 +#CHECK: error: missing length in address +#CHECK: sp 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: sp 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: sp 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: sp 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: sp 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: sp 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: sp -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: sp 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: sp 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: sp 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: sp 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: sp 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: sp 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: sp 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: sp 0(-), 0(1) + + sp 0, 0(1) + sp 0(1), 0 + sp 0(%r1), 0(1,%r1) + sp 0(1,%r1), 0(%r1) + sp 0(0,%r1), 0(1,%r1) + sp 0(1,%r1), 0(0,%r1) + sp 0(17,%r1), 0(1,%r1) + sp 0(1,%r1), 0(17,%r1) + sp -1(1,%r1), 0(1,%r1) + sp 4096(1,%r1), 0(1,%r1) + sp 0(1,%r1), -1(1,%r1) + sp 0(1,%r1), 4096(1,%r1) + sp 0(1,%r0), 0(1,%r1) + sp 0(1,%r1), 0(1,%r0) + sp 0(%r1,%r2), 0(1,%r1) + sp 0(1,%r2), 0(%r1,%r2) + sp 0(-), 0(1) + #CHECK: error: invalid operand #CHECK: sqdb %f0, -1 #CHECK: error: invalid operand @@ -3965,6 +4648,56 @@ srnmt 4096 srnmt 0(%r1,%r2) +#CHECK: error: missing length in address +#CHECK: srp 0, 0, 0 +#CHECK: error: missing length in address +#CHECK: srp 0(%r1), 0(%r1), 0 +#CHECK: error: invalid use of length addressing +#CHECK: srp 0(1,%r1), 0(2,%r1), 0 +#CHECK: error: invalid operand +#CHECK: srp 0(0,%r1), 0(%r1), 0 +#CHECK: error: invalid operand +#CHECK: srp 0(17,%r1), 0(%r1), 0 +#CHECK: error: invalid operand +#CHECK: srp -1(1,%r1), 0(%r1), 0 +#CHECK: error: invalid operand +#CHECK: srp 4096(1,%r1), 0(%r1), 0 +#CHECK: error: invalid operand +#CHECK: srp 0(1,%r1), -1(%r1), 0 +#CHECK: error: invalid operand +#CHECK: srp 0(1,%r1), 4096(%r1), 0 +#CHECK: error: %r0 used in an address +#CHECK: srp 0(1,%r0), 0(%r1), 0 +#CHECK: error: %r0 used in an address +#CHECK: srp 0(1,%r1), 0(%r0), 0 +#CHECK: error: invalid use of indexed addressing +#CHECK: srp 0(%r1,%r2), 0(%r1), 0 +#CHECK: error: invalid use of indexed addressing +#CHECK: srp 0(1,%r2), 0(%r1,%r2), 0 +#CHECK: error: invalid operand +#CHECK: srp 0(1), 0, -1 +#CHECK: error: invalid operand +#CHECK: srp 0(1), 0, 16 +#CHECK: error: unknown token in expression +#CHECK: srp 0(-), 0, 0 + + srp 0, 0, 0 + srp 0(%r1), 0(%r1), 0 + srp 0(1,%r1), 0(2,%r1), 0 + srp 0(0,%r1), 0(%r1), 0 + srp 0(17,%r1), 0(%r1), 0 + srp -1(1,%r1), 0(%r1), 0 + srp 4096(1,%r1), 0(%r1), 0 + srp 0(1,%r1), -1(%r1), 0 + srp 0(1,%r1), 4096(%r1), 0 + srp 0(1,%r0), 0(%r1), 0 + srp 0(1,%r1), 0(%r0), 0 + srp 0(%r1,%r2), 0(%r1), 0 + srp 0(1,%r2), 0(%r1,%r2), 0 + srp 0(1), 0, -1 + srp 0(1), 0, 16 + srp 0(-), 0, 0 + #CHECK: error: invalid operand #CHECK: st %r0, -1 #CHECK: error: invalid operand @@ -4347,6 +5080,35 @@ tmy 0, -1 tmy 0, 256 +#CHECK: error: missing length in address +#CHECK: tp 0 +#CHECK: error: missing length in address +#CHECK: tp 0(%r1) +#CHECK: error: invalid operand +#CHECK: tp 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: tp 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: tp -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: tp 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: tp 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: tp 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: tp 0(-) + + tp 0 + tp 0(%r1) + tp 0(0,%r1) + tp 0(17,%r1) + tp -1(1,%r1) + tp 4096(1,%r1) + tp 0(1,%r0) + tp 0(%r1,%r2) + tp 0(-) + #CHECK: error: missing length in address #CHECK: tr 0, 0 #CHECK: error: missing length in address @@ -4561,6 +5323,147 @@ ts 4096 ts 0(%r1,%r2) +#CHECK: error: missing length in address +#CHECK: unpk 0, 0(1) +#CHECK: error: missing length in address +#CHECK: unpk 0(1), 0 +#CHECK: error: missing length in address +#CHECK: unpk 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: unpk 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpk 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: unpk 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: unpk 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: unpk 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: unpk -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: unpk 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: unpk 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: unpk 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: unpk 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: unpk 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: unpk 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: unpk 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: unpk 0(-), 0(1) + + unpk 0, 0(1) + unpk 0(1), 0 + unpk 0(%r1), 0(1,%r1) + unpk 0(1,%r1), 0(%r1) + unpk 0(0,%r1), 0(1,%r1) + unpk 0(1,%r1), 0(0,%r1) + unpk 0(17,%r1), 0(1,%r1) + unpk 0(1,%r1), 0(17,%r1) + unpk -1(1,%r1), 0(1,%r1) + unpk 4096(1,%r1), 0(1,%r1) + unpk 0(1,%r1), -1(1,%r1) + unpk 0(1,%r1), 4096(1,%r1) + unpk 0(1,%r0), 0(1,%r1) + unpk 0(1,%r1), 0(1,%r0) + unpk 0(%r1,%r2), 0(1,%r1) + unpk 0(1,%r2), 0(%r1,%r2) + unpk 0(-), 0(1) + +#CHECK: error: missing length in address +#CHECK: unpka 0, 0 +#CHECK: error: missing length in address +#CHECK: unpka 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: unpka 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: unpka 0(0,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpka 0(257,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpka -1(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpka 4096(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpka 0(1,%r1), -1(%r1) +#CHECK: error: invalid operand +#CHECK: unpka 0(1,%r1), 4096(%r1) +#CHECK: error: %r0 used in an address +#CHECK: unpka 0(1,%r0), 0(%r1) +#CHECK: error: %r0 used in an address +#CHECK: unpka 0(1,%r1), 0(%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: unpka 0(%r1,%r2), 0(%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: unpka 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: unpka 0(-), 0 + + unpka 0, 0 + unpka 0(%r1), 0(%r1) + unpka 0(1,%r1), 0(2,%r1) + unpka 0(0,%r1), 0(%r1) + unpka 0(257,%r1), 0(%r1) + unpka -1(1,%r1), 0(%r1) + unpka 4096(1,%r1), 0(%r1) + unpka 0(1,%r1), -1(%r1) + unpka 0(1,%r1), 4096(%r1) + unpka 0(1,%r0), 0(%r1) + unpka 0(1,%r1), 0(%r0) + unpka 0(%r1,%r2), 0(%r1) + unpka 0(1,%r2), 0(%r1,%r2) + unpka 0(-), 0 + +#CHECK: error: missing length in address +#CHECK: unpku 0, 0 +#CHECK: error: missing length in address +#CHECK: unpku 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: unpku 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: unpku 0(0,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpku 0(257,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpku -1(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpku 4096(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: unpku 0(1,%r1), -1(%r1) +#CHECK: error: invalid operand +#CHECK: unpku 0(1,%r1), 4096(%r1) +#CHECK: error: %r0 used in an address +#CHECK: unpku 0(1,%r0), 0(%r1) +#CHECK: error: %r0 used in an address +#CHECK: unpku 0(1,%r1), 0(%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: unpku 0(%r1,%r2), 0(%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: unpku 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: unpku 0(-), 0 + + unpku 0, 0 + unpku 0(%r1), 0(%r1) + unpku 0(1,%r1), 0(2,%r1) + unpku 0(0,%r1), 0(%r1) + unpku 0(257,%r1), 0(%r1) + unpku -1(1,%r1), 0(%r1) + unpku 4096(1,%r1), 0(%r1) + unpku 0(1,%r1), -1(%r1) + unpku 0(1,%r1), 4096(%r1) + unpku 0(1,%r0), 0(%r1) + unpku 0(1,%r1), 0(%r0) + unpku 0(%r1,%r2), 0(%r1) + unpku 0(1,%r2), 0(%r1,%r2) + unpku 0(-), 0 + #CHECK: error: invalid operand #CHECK: x %r0, -1 #CHECK: error: invalid operand @@ -4688,3 +5591,56 @@ xy %r0, -524289 xy %r0, 524288 + +#CHECK: error: missing length in address +#CHECK: zap 0, 0(1) +#CHECK: error: missing length in address +#CHECK: zap 0(1), 0 +#CHECK: error: missing length in address +#CHECK: zap 0(%r1), 0(1,%r1) +#CHECK: error: missing length in address +#CHECK: zap 0(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: zap 0(0,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: zap 0(1,%r1), 0(0,%r1) +#CHECK: error: invalid operand +#CHECK: zap 0(17,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: zap 0(1,%r1), 0(17,%r1) +#CHECK: error: invalid operand +#CHECK: zap -1(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: zap 4096(1,%r1), 0(1,%r1) +#CHECK: error: invalid operand +#CHECK: zap 0(1,%r1), -1(1,%r1) +#CHECK: error: invalid operand +#CHECK: zap 0(1,%r1), 4096(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: zap 0(1,%r0), 0(1,%r1) +#CHECK: error: %r0 used in an address +#CHECK: zap 0(1,%r1), 0(1,%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: zap 0(%r1,%r2), 0(1,%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: zap 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: zap 0(-), 0(1) + + zap 0, 0(1) + zap 0(1), 0 + zap 0(%r1), 0(1,%r1) + zap 0(1,%r1), 0(%r1) + zap 0(0,%r1), 0(1,%r1) + zap 0(1,%r1), 0(0,%r1) + zap 0(17,%r1), 0(1,%r1) + zap 0(1,%r1), 0(17,%r1) + zap -1(1,%r1), 0(1,%r1) + zap 4096(1,%r1), 0(1,%r1) + zap 0(1,%r1), -1(1,%r1) + zap 0(1,%r1), 4096(1,%r1) + zap 0(1,%r0), 0(1,%r1) + zap 0(1,%r1), 0(1,%r0) + zap 0(%r1,%r2), 0(1,%r1) + zap 0(1,%r2), 0(%r1,%r2) + zap 0(-), 0(1) diff --git a/test/MC/SystemZ/insn-good.s b/test/MC/SystemZ/insn-good.s index df075c7c72f..6086c9a2aa9 100644 --- a/test/MC/SystemZ/insn-good.s +++ b/test/MC/SystemZ/insn-good.s @@ -447,6 +447,36 @@ aly %r0, 524287(%r15,%r1) aly %r15, 0 +#CHECK: ap 0(1), 0(1) # encoding: [0xfa,0x00,0x00,0x00,0x00,0x00] +#CHECK: ap 0(1), 0(1,%r1) # encoding: [0xfa,0x00,0x00,0x00,0x10,0x00] +#CHECK: ap 0(1), 0(1,%r15) # encoding: [0xfa,0x00,0x00,0x00,0xf0,0x00] +#CHECK: ap 0(1), 4095(1) # encoding: [0xfa,0x00,0x00,0x00,0x0f,0xff] +#CHECK: ap 0(1), 4095(1,%r1) # encoding: [0xfa,0x00,0x00,0x00,0x1f,0xff] +#CHECK: ap 0(1), 4095(1,%r15) # encoding: [0xfa,0x00,0x00,0x00,0xff,0xff] +#CHECK: ap 0(1,%r1), 0(1) # encoding: [0xfa,0x00,0x10,0x00,0x00,0x00] +#CHECK: ap 0(1,%r15), 0(1) # encoding: [0xfa,0x00,0xf0,0x00,0x00,0x00] +#CHECK: ap 4095(1,%r1), 0(1) # encoding: [0xfa,0x00,0x1f,0xff,0x00,0x00] +#CHECK: ap 4095(1,%r15), 0(1) # encoding: [0xfa,0x00,0xff,0xff,0x00,0x00] +#CHECK: ap 0(16,%r1), 0(1) # encoding: [0xfa,0xf0,0x10,0x00,0x00,0x00] +#CHECK: ap 0(16,%r15), 0(1) # encoding: [0xfa,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: ap 0(1), 0(16,%r1) # encoding: [0xfa,0x0f,0x00,0x00,0x10,0x00] +#CHECK: ap 0(1), 0(16,%r15) # encoding: [0xfa,0x0f,0x00,0x00,0xf0,0x00] + + ap 0(1), 0(1) + ap 0(1), 0(1,%r1) + ap 0(1), 0(1,%r15) + ap 0(1), 4095(1) + ap 0(1), 4095(1,%r1) + ap 0(1), 4095(1,%r15) + ap 0(1,%r1), 0(1) + ap 0(1,%r15), 0(1) + ap 4095(1,%r1), 0(1) + ap 4095(1,%r15), 0(1) + ap 0(16,%r1), 0(1) + ap 0(16,%r15), 0(1) + ap 0(1), 0(16,%r1) + ap 0(1), 0(16,%r15) + #CHECK: ar %r0, %r0 # encoding: [0x1a,0x00] #CHECK: ar %r0, %r15 # encoding: [0x1a,0x0f] #CHECK: ar %r15, %r0 # encoding: [0x1a,0xf0] @@ -5228,6 +5258,36 @@ cly %r0, 524287(%r15,%r1) cly %r15, 0 +#CHECK: cp 0(1), 0(1) # encoding: [0xf9,0x00,0x00,0x00,0x00,0x00] +#CHECK: cp 0(1), 0(1,%r1) # encoding: [0xf9,0x00,0x00,0x00,0x10,0x00] +#CHECK: cp 0(1), 0(1,%r15) # encoding: [0xf9,0x00,0x00,0x00,0xf0,0x00] +#CHECK: cp 0(1), 4095(1) # encoding: [0xf9,0x00,0x00,0x00,0x0f,0xff] +#CHECK: cp 0(1), 4095(1,%r1) # encoding: [0xf9,0x00,0x00,0x00,0x1f,0xff] +#CHECK: cp 0(1), 4095(1,%r15) # encoding: [0xf9,0x00,0x00,0x00,0xff,0xff] +#CHECK: cp 0(1,%r1), 0(1) # encoding: [0xf9,0x00,0x10,0x00,0x00,0x00] +#CHECK: cp 0(1,%r15), 0(1) # encoding: [0xf9,0x00,0xf0,0x00,0x00,0x00] +#CHECK: cp 4095(1,%r1), 0(1) # encoding: [0xf9,0x00,0x1f,0xff,0x00,0x00] +#CHECK: cp 4095(1,%r15), 0(1) # encoding: [0xf9,0x00,0xff,0xff,0x00,0x00] +#CHECK: cp 0(16,%r1), 0(1) # encoding: [0xf9,0xf0,0x10,0x00,0x00,0x00] +#CHECK: cp 0(16,%r15), 0(1) # encoding: [0xf9,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: cp 0(1), 0(16,%r1) # encoding: [0xf9,0x0f,0x00,0x00,0x10,0x00] +#CHECK: cp 0(1), 0(16,%r15) # encoding: [0xf9,0x0f,0x00,0x00,0xf0,0x00] + + cp 0(1), 0(1) + cp 0(1), 0(1,%r1) + cp 0(1), 0(1,%r15) + cp 0(1), 4095(1) + cp 0(1), 4095(1,%r1) + cp 0(1), 4095(1,%r15) + cp 0(1,%r1), 0(1) + cp 0(1,%r15), 0(1) + cp 4095(1,%r1), 0(1) + cp 4095(1,%r15), 0(1) + cp 0(16,%r1), 0(1) + cp 0(16,%r15), 0(1) + cp 0(1), 0(16,%r1) + cp 0(1), 0(16,%r15) + #CHECK: cpsdr %f0, %f0, %f0 # encoding: [0xb3,0x72,0x00,0x00] #CHECK: cpsdr %f0, %f0, %f15 # encoding: [0xb3,0x72,0x00,0x0f] #CHECK: cpsdr %f0, %f15, %f0 # encoding: [0xb3,0x72,0xf0,0x00] @@ -5823,6 +5883,126 @@ cuutf %r4, %r12, 0 cuutf %r4, %r12, 15 +#CHECK: cvb %r0, 0 # encoding: [0x4f,0x00,0x00,0x00] +#CHECK: cvb %r0, 4095 # encoding: [0x4f,0x00,0x0f,0xff] +#CHECK: cvb %r0, 0(%r1) # encoding: [0x4f,0x00,0x10,0x00] +#CHECK: cvb %r0, 0(%r15) # encoding: [0x4f,0x00,0xf0,0x00] +#CHECK: cvb %r0, 4095(%r1,%r15) # encoding: [0x4f,0x01,0xff,0xff] +#CHECK: cvb %r0, 4095(%r15,%r1) # encoding: [0x4f,0x0f,0x1f,0xff] +#CHECK: cvb %r15, 0 # encoding: [0x4f,0xf0,0x00,0x00] + + cvb %r0, 0 + cvb %r0, 4095 + cvb %r0, 0(%r1) + cvb %r0, 0(%r15) + cvb %r0, 4095(%r1,%r15) + cvb %r0, 4095(%r15,%r1) + cvb %r15, 0 + +#CHECK: cvbg %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x0e] +#CHECK: cvbg %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x0e] +#CHECK: cvbg %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x0e] +#CHECK: cvbg %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0x0e] +#CHECK: cvbg %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x0e] +#CHECK: cvbg %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0x0e] +#CHECK: cvbg %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x0e] +#CHECK: cvbg %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x0e] +#CHECK: cvbg %r0, 524287(%r15,%r1) # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x0e] +#CHECK: cvbg %r15, 0 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0x0e] + + cvbg %r0, -524288 + cvbg %r0, -1 + cvbg %r0, 0 + cvbg %r0, 1 + cvbg %r0, 524287 + cvbg %r0, 0(%r1) + cvbg %r0, 0(%r15) + cvbg %r0, 524287(%r1,%r15) + cvbg %r0, 524287(%r15,%r1) + cvbg %r15, 0 + +#CHECK: cvby %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x06] +#CHECK: cvby %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x06] +#CHECK: cvby %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x06] +#CHECK: cvby %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0x06] +#CHECK: cvby %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x06] +#CHECK: cvby %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0x06] +#CHECK: cvby %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x06] +#CHECK: cvby %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x06] +#CHECK: cvby %r0, 524287(%r15,%r1) # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x06] +#CHECK: cvby %r15, 0 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0x06] + + cvby %r0, -524288 + cvby %r0, -1 + cvby %r0, 0 + cvby %r0, 1 + cvby %r0, 524287 + cvby %r0, 0(%r1) + cvby %r0, 0(%r15) + cvby %r0, 524287(%r1,%r15) + cvby %r0, 524287(%r15,%r1) + cvby %r15, 0 + +#CHECK: cvd %r0, 0 # encoding: [0x4e,0x00,0x00,0x00] +#CHECK: cvd %r0, 4095 # encoding: [0x4e,0x00,0x0f,0xff] +#CHECK: cvd %r0, 0(%r1) # encoding: [0x4e,0x00,0x10,0x00] +#CHECK: cvd %r0, 0(%r15) # encoding: [0x4e,0x00,0xf0,0x00] +#CHECK: cvd %r0, 4095(%r1,%r15) # encoding: [0x4e,0x01,0xff,0xff] +#CHECK: cvd %r0, 4095(%r15,%r1) # encoding: [0x4e,0x0f,0x1f,0xff] +#CHECK: cvd %r15, 0 # encoding: [0x4e,0xf0,0x00,0x00] + + cvd %r0, 0 + cvd %r0, 4095 + cvd %r0, 0(%r1) + cvd %r0, 0(%r15) + cvd %r0, 4095(%r1,%r15) + cvd %r0, 4095(%r15,%r1) + cvd %r15, 0 + +#CHECK: cvdg %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x2e] +#CHECK: cvdg %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x2e] +#CHECK: cvdg %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x2e] +#CHECK: cvdg %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0x2e] +#CHECK: cvdg %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x2e] +#CHECK: cvdg %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0x2e] +#CHECK: cvdg %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x2e] +#CHECK: cvdg %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x2e] +#CHECK: cvdg %r0, 524287(%r15,%r1) # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x2e] +#CHECK: cvdg %r15, 0 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0x2e] + + cvdg %r0, -524288 + cvdg %r0, -1 + cvdg %r0, 0 + cvdg %r0, 1 + cvdg %r0, 524287 + cvdg %r0, 0(%r1) + cvdg %r0, 0(%r15) + cvdg %r0, 524287(%r1,%r15) + cvdg %r0, 524287(%r15,%r1) + cvdg %r15, 0 + +#CHECK: cvdy %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x26] +#CHECK: cvdy %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x26] +#CHECK: cvdy %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x26] +#CHECK: cvdy %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0x26] +#CHECK: cvdy %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x26] +#CHECK: cvdy %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0x26] +#CHECK: cvdy %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x26] +#CHECK: cvdy %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x26] +#CHECK: cvdy %r0, 524287(%r15,%r1) # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x26] +#CHECK: cvdy %r15, 0 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0x26] + + cvdy %r0, -524288 + cvdy %r0, -1 + cvdy %r0, 0 + cvdy %r0, 1 + cvdy %r0, 524287 + cvdy %r0, 0(%r1) + cvdy %r0, 0(%r15) + cvdy %r0, 524287(%r1,%r15) + cvdy %r0, 524287(%r15,%r1) + cvdy %r15, 0 + #CHECK: cxbr %f0, %f0 # encoding: [0xb3,0x49,0x00,0x00] #CHECK: cxbr %f0, %f13 # encoding: [0xb3,0x49,0x00,0x0d] #CHECK: cxbr %f8, %f8 # encoding: [0xb3,0x49,0x00,0x88] @@ -5995,6 +6175,36 @@ dlr %r14,%r0 dlr %r6,%r9 +#CHECK: dp 0(1), 0(1) # encoding: [0xfd,0x00,0x00,0x00,0x00,0x00] +#CHECK: dp 0(1), 0(1,%r1) # encoding: [0xfd,0x00,0x00,0x00,0x10,0x00] +#CHECK: dp 0(1), 0(1,%r15) # encoding: [0xfd,0x00,0x00,0x00,0xf0,0x00] +#CHECK: dp 0(1), 4095(1) # encoding: [0xfd,0x00,0x00,0x00,0x0f,0xff] +#CHECK: dp 0(1), 4095(1,%r1) # encoding: [0xfd,0x00,0x00,0x00,0x1f,0xff] +#CHECK: dp 0(1), 4095(1,%r15) # encoding: [0xfd,0x00,0x00,0x00,0xff,0xff] +#CHECK: dp 0(1,%r1), 0(1) # encoding: [0xfd,0x00,0x10,0x00,0x00,0x00] +#CHECK: dp 0(1,%r15), 0(1) # encoding: [0xfd,0x00,0xf0,0x00,0x00,0x00] +#CHECK: dp 4095(1,%r1), 0(1) # encoding: [0xfd,0x00,0x1f,0xff,0x00,0x00] +#CHECK: dp 4095(1,%r15), 0(1) # encoding: [0xfd,0x00,0xff,0xff,0x00,0x00] +#CHECK: dp 0(16,%r1), 0(1) # encoding: [0xfd,0xf0,0x10,0x00,0x00,0x00] +#CHECK: dp 0(16,%r15), 0(1) # encoding: [0xfd,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: dp 0(1), 0(16,%r1) # encoding: [0xfd,0x0f,0x00,0x00,0x10,0x00] +#CHECK: dp 0(1), 0(16,%r15) # encoding: [0xfd,0x0f,0x00,0x00,0xf0,0x00] + + dp 0(1), 0(1) + dp 0(1), 0(1,%r1) + dp 0(1), 0(1,%r15) + dp 0(1), 4095(1) + dp 0(1), 4095(1,%r1) + dp 0(1), 4095(1,%r15) + dp 0(1,%r1), 0(1) + dp 0(1,%r15), 0(1) + dp 4095(1,%r1), 0(1) + dp 4095(1,%r15), 0(1) + dp 0(16,%r1), 0(1) + dp 0(16,%r15), 0(1) + dp 0(1), 0(16,%r1) + dp 0(1), 0(16,%r15) + #CHECK: dsg %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x0d] #CHECK: dsg %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x0d] #CHECK: dsg %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x0d] @@ -6095,6 +6305,58 @@ ectg 0(%r1),1(%r15),%r2 ectg 0(%r1),4095(%r15),%r2 +#CHECK: ed 0(1), 0 # encoding: [0xde,0x00,0x00,0x00,0x00,0x00] +#CHECK: ed 0(1), 0(%r1) # encoding: [0xde,0x00,0x00,0x00,0x10,0x00] +#CHECK: ed 0(1), 0(%r15) # encoding: [0xde,0x00,0x00,0x00,0xf0,0x00] +#CHECK: ed 0(1), 4095 # encoding: [0xde,0x00,0x00,0x00,0x0f,0xff] +#CHECK: ed 0(1), 4095(%r1) # encoding: [0xde,0x00,0x00,0x00,0x1f,0xff] +#CHECK: ed 0(1), 4095(%r15) # encoding: [0xde,0x00,0x00,0x00,0xff,0xff] +#CHECK: ed 0(1,%r1), 0 # encoding: [0xde,0x00,0x10,0x00,0x00,0x00] +#CHECK: ed 0(1,%r15), 0 # encoding: [0xde,0x00,0xf0,0x00,0x00,0x00] +#CHECK: ed 4095(1,%r1), 0 # encoding: [0xde,0x00,0x1f,0xff,0x00,0x00] +#CHECK: ed 4095(1,%r15), 0 # encoding: [0xde,0x00,0xff,0xff,0x00,0x00] +#CHECK: ed 0(256,%r1), 0 # encoding: [0xde,0xff,0x10,0x00,0x00,0x00] +#CHECK: ed 0(256,%r15), 0 # encoding: [0xde,0xff,0xf0,0x00,0x00,0x00] + + ed 0(1), 0 + ed 0(1), 0(%r1) + ed 0(1), 0(%r15) + ed 0(1), 4095 + ed 0(1), 4095(%r1) + ed 0(1), 4095(%r15) + ed 0(1,%r1), 0 + ed 0(1,%r15), 0 + ed 4095(1,%r1), 0 + ed 4095(1,%r15), 0 + ed 0(256,%r1), 0 + ed 0(256,%r15), 0 + +#CHECK: edmk 0(1), 0 # encoding: [0xdf,0x00,0x00,0x00,0x00,0x00] +#CHECK: edmk 0(1), 0(%r1) # encoding: [0xdf,0x00,0x00,0x00,0x10,0x00] +#CHECK: edmk 0(1), 0(%r15) # encoding: [0xdf,0x00,0x00,0x00,0xf0,0x00] +#CHECK: edmk 0(1), 4095 # encoding: [0xdf,0x00,0x00,0x00,0x0f,0xff] +#CHECK: edmk 0(1), 4095(%r1) # encoding: [0xdf,0x00,0x00,0x00,0x1f,0xff] +#CHECK: edmk 0(1), 4095(%r15) # encoding: [0xdf,0x00,0x00,0x00,0xff,0xff] +#CHECK: edmk 0(1,%r1), 0 # encoding: [0xdf,0x00,0x10,0x00,0x00,0x00] +#CHECK: edmk 0(1,%r15), 0 # encoding: [0xdf,0x00,0xf0,0x00,0x00,0x00] +#CHECK: edmk 4095(1,%r1), 0 # encoding: [0xdf,0x00,0x1f,0xff,0x00,0x00] +#CHECK: edmk 4095(1,%r15), 0 # encoding: [0xdf,0x00,0xff,0xff,0x00,0x00] +#CHECK: edmk 0(256,%r1), 0 # encoding: [0xdf,0xff,0x10,0x00,0x00,0x00] +#CHECK: edmk 0(256,%r15), 0 # encoding: [0xdf,0xff,0xf0,0x00,0x00,0x00] + + edmk 0(1), 0 + edmk 0(1), 0(%r1) + edmk 0(1), 0(%r15) + edmk 0(1), 4095 + edmk 0(1), 4095(%r1) + edmk 0(1), 4095(%r15) + edmk 0(1,%r1), 0 + edmk 0(1,%r15), 0 + edmk 4095(1,%r1), 0 + edmk 4095(1,%r15), 0 + edmk 0(256,%r1), 0 + edmk 0(256,%r15), 0 + #CHECK: efpc %r0 # encoding: [0xb3,0x8c,0x00,0x00] #CHECK: efpc %r1 # encoding: [0xb3,0x8c,0x00,0x10] #CHECK: efpc %r15 # encoding: [0xb3,0x8c,0x00,0xf0] @@ -8412,6 +8674,36 @@ mlgr %r14,%r0 mlgr %r6,%r9 +#CHECK: mp 0(1), 0(1) # encoding: [0xfc,0x00,0x00,0x00,0x00,0x00] +#CHECK: mp 0(1), 0(1,%r1) # encoding: [0xfc,0x00,0x00,0x00,0x10,0x00] +#CHECK: mp 0(1), 0(1,%r15) # encoding: [0xfc,0x00,0x00,0x00,0xf0,0x00] +#CHECK: mp 0(1), 4095(1) # encoding: [0xfc,0x00,0x00,0x00,0x0f,0xff] +#CHECK: mp 0(1), 4095(1,%r1) # encoding: [0xfc,0x00,0x00,0x00,0x1f,0xff] +#CHECK: mp 0(1), 4095(1,%r15) # encoding: [0xfc,0x00,0x00,0x00,0xff,0xff] +#CHECK: mp 0(1,%r1), 0(1) # encoding: [0xfc,0x00,0x10,0x00,0x00,0x00] +#CHECK: mp 0(1,%r15), 0(1) # encoding: [0xfc,0x00,0xf0,0x00,0x00,0x00] +#CHECK: mp 4095(1,%r1), 0(1) # encoding: [0xfc,0x00,0x1f,0xff,0x00,0x00] +#CHECK: mp 4095(1,%r15), 0(1) # encoding: [0xfc,0x00,0xff,0xff,0x00,0x00] +#CHECK: mp 0(16,%r1), 0(1) # encoding: [0xfc,0xf0,0x10,0x00,0x00,0x00] +#CHECK: mp 0(16,%r15), 0(1) # encoding: [0xfc,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: mp 0(1), 0(16,%r1) # encoding: [0xfc,0x0f,0x00,0x00,0x10,0x00] +#CHECK: mp 0(1), 0(16,%r15) # encoding: [0xfc,0x0f,0x00,0x00,0xf0,0x00] + + mp 0(1), 0(1) + mp 0(1), 0(1,%r1) + mp 0(1), 0(1,%r15) + mp 0(1), 4095(1) + mp 0(1), 4095(1,%r1) + mp 0(1), 4095(1,%r15) + mp 0(1,%r1), 0(1) + mp 0(1,%r15), 0(1) + mp 4095(1,%r1), 0(1) + mp 4095(1,%r15), 0(1) + mp 0(16,%r1), 0(1) + mp 0(16,%r15), 0(1) + mp 0(1), 0(16,%r1) + mp 0(1), 0(16,%r15) + #CHECK: ms %r0, 0 # encoding: [0x71,0x00,0x00,0x00] #CHECK: ms %r0, 4095 # encoding: [0x71,0x00,0x0f,0xff] #CHECK: ms %r0, 0(%r1) # encoding: [0x71,0x00,0x10,0x00] @@ -8858,6 +9150,62 @@ mviy 524287(%r1), 42 mviy 524287(%r15), 42 +#CHECK: mvn 0(1), 0 # encoding: [0xd1,0x00,0x00,0x00,0x00,0x00] +#CHECK: mvn 0(1), 0(%r1) # encoding: [0xd1,0x00,0x00,0x00,0x10,0x00] +#CHECK: mvn 0(1), 0(%r15) # encoding: [0xd1,0x00,0x00,0x00,0xf0,0x00] +#CHECK: mvn 0(1), 4095 # encoding: [0xd1,0x00,0x00,0x00,0x0f,0xff] +#CHECK: mvn 0(1), 4095(%r1) # encoding: [0xd1,0x00,0x00,0x00,0x1f,0xff] +#CHECK: mvn 0(1), 4095(%r15) # encoding: [0xd1,0x00,0x00,0x00,0xff,0xff] +#CHECK: mvn 0(1,%r1), 0 # encoding: [0xd1,0x00,0x10,0x00,0x00,0x00] +#CHECK: mvn 0(1,%r15), 0 # encoding: [0xd1,0x00,0xf0,0x00,0x00,0x00] +#CHECK: mvn 4095(1,%r1), 0 # encoding: [0xd1,0x00,0x1f,0xff,0x00,0x00] +#CHECK: mvn 4095(1,%r15), 0 # encoding: [0xd1,0x00,0xff,0xff,0x00,0x00] +#CHECK: mvn 0(256,%r1), 0 # encoding: [0xd1,0xff,0x10,0x00,0x00,0x00] +#CHECK: mvn 0(256,%r15), 0 # encoding: [0xd1,0xff,0xf0,0x00,0x00,0x00] + + mvn 0(1), 0 + mvn 0(1), 0(%r1) + mvn 0(1), 0(%r15) + mvn 0(1), 4095 + mvn 0(1), 4095(%r1) + mvn 0(1), 4095(%r15) + mvn 0(1,%r1), 0 + mvn 0(1,%r15), 0 + mvn 4095(1,%r1), 0 + mvn 4095(1,%r15), 0 + mvn 0(256,%r1), 0 + mvn 0(256,%r15), 0 + +#CHECK: mvo 0(1), 0(1) # encoding: [0xf1,0x00,0x00,0x00,0x00,0x00] +#CHECK: mvo 0(1), 0(1,%r1) # encoding: [0xf1,0x00,0x00,0x00,0x10,0x00] +#CHECK: mvo 0(1), 0(1,%r15) # encoding: [0xf1,0x00,0x00,0x00,0xf0,0x00] +#CHECK: mvo 0(1), 4095(1) # encoding: [0xf1,0x00,0x00,0x00,0x0f,0xff] +#CHECK: mvo 0(1), 4095(1,%r1) # encoding: [0xf1,0x00,0x00,0x00,0x1f,0xff] +#CHECK: mvo 0(1), 4095(1,%r15) # encoding: [0xf1,0x00,0x00,0x00,0xff,0xff] +#CHECK: mvo 0(1,%r1), 0(1) # encoding: [0xf1,0x00,0x10,0x00,0x00,0x00] +#CHECK: mvo 0(1,%r15), 0(1) # encoding: [0xf1,0x00,0xf0,0x00,0x00,0x00] +#CHECK: mvo 4095(1,%r1), 0(1) # encoding: [0xf1,0x00,0x1f,0xff,0x00,0x00] +#CHECK: mvo 4095(1,%r15), 0(1) # encoding: [0xf1,0x00,0xff,0xff,0x00,0x00] +#CHECK: mvo 0(16,%r1), 0(1) # encoding: [0xf1,0xf0,0x10,0x00,0x00,0x00] +#CHECK: mvo 0(16,%r15), 0(1) # encoding: [0xf1,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: mvo 0(1), 0(16,%r1) # encoding: [0xf1,0x0f,0x00,0x00,0x10,0x00] +#CHECK: mvo 0(1), 0(16,%r15) # encoding: [0xf1,0x0f,0x00,0x00,0xf0,0x00] + + mvo 0(1), 0(1) + mvo 0(1), 0(1,%r1) + mvo 0(1), 0(1,%r15) + mvo 0(1), 4095(1) + mvo 0(1), 4095(1,%r1) + mvo 0(1), 4095(1,%r15) + mvo 0(1,%r1), 0(1) + mvo 0(1,%r15), 0(1) + mvo 4095(1,%r1), 0(1) + mvo 4095(1,%r15), 0(1) + mvo 0(16,%r1), 0(1) + mvo 0(16,%r15), 0(1) + mvo 0(1), 0(16,%r1) + mvo 0(1), 0(16,%r15) + #CHECK: mvst %r0, %r0 # encoding: [0xb2,0x55,0x00,0x00] #CHECK: mvst %r0, %r15 # encoding: [0xb2,0x55,0x00,0x0f] #CHECK: mvst %r15, %r0 # encoding: [0xb2,0x55,0x00,0xf0] @@ -8868,6 +9216,32 @@ mvst %r15,%r0 mvst %r7,%r8 +#CHECK: mvz 0(1), 0 # encoding: [0xd3,0x00,0x00,0x00,0x00,0x00] +#CHECK: mvz 0(1), 0(%r1) # encoding: [0xd3,0x00,0x00,0x00,0x10,0x00] +#CHECK: mvz 0(1), 0(%r15) # encoding: [0xd3,0x00,0x00,0x00,0xf0,0x00] +#CHECK: mvz 0(1), 4095 # encoding: [0xd3,0x00,0x00,0x00,0x0f,0xff] +#CHECK: mvz 0(1), 4095(%r1) # encoding: [0xd3,0x00,0x00,0x00,0x1f,0xff] +#CHECK: mvz 0(1), 4095(%r15) # encoding: [0xd3,0x00,0x00,0x00,0xff,0xff] +#CHECK: mvz 0(1,%r1), 0 # encoding: [0xd3,0x00,0x10,0x00,0x00,0x00] +#CHECK: mvz 0(1,%r15), 0 # encoding: [0xd3,0x00,0xf0,0x00,0x00,0x00] +#CHECK: mvz 4095(1,%r1), 0 # encoding: [0xd3,0x00,0x1f,0xff,0x00,0x00] +#CHECK: mvz 4095(1,%r15), 0 # encoding: [0xd3,0x00,0xff,0xff,0x00,0x00] +#CHECK: mvz 0(256,%r1), 0 # encoding: [0xd3,0xff,0x10,0x00,0x00,0x00] +#CHECK: mvz 0(256,%r15), 0 # encoding: [0xd3,0xff,0xf0,0x00,0x00,0x00] + + mvz 0(1), 0 + mvz 0(1), 0(%r1) + mvz 0(1), 0(%r15) + mvz 0(1), 4095 + mvz 0(1), 4095(%r1) + mvz 0(1), 4095(%r15) + mvz 0(1,%r1), 0 + mvz 0(1,%r15), 0 + mvz 4095(1,%r1), 0 + mvz 4095(1,%r15), 0 + mvz 0(256,%r1), 0 + mvz 0(256,%r15), 0 + #CHECK: mxbr %f0, %f0 # encoding: [0xb3,0x4c,0x00,0x00] #CHECK: mxbr %f0, %f13 # encoding: [0xb3,0x4c,0x00,0x0d] #CHECK: mxbr %f8, %f5 # encoding: [0xb3,0x4c,0x00,0x85] @@ -9310,6 +9684,36 @@ oy %r0, 524287(%r15,%r1) oy %r15, 0 +#CHECK: pack 0(1), 0(1) # encoding: [0xf2,0x00,0x00,0x00,0x00,0x00] +#CHECK: pack 0(1), 0(1,%r1) # encoding: [0xf2,0x00,0x00,0x00,0x10,0x00] +#CHECK: pack 0(1), 0(1,%r15) # encoding: [0xf2,0x00,0x00,0x00,0xf0,0x00] +#CHECK: pack 0(1), 4095(1) # encoding: [0xf2,0x00,0x00,0x00,0x0f,0xff] +#CHECK: pack 0(1), 4095(1,%r1) # encoding: [0xf2,0x00,0x00,0x00,0x1f,0xff] +#CHECK: pack 0(1), 4095(1,%r15) # encoding: [0xf2,0x00,0x00,0x00,0xff,0xff] +#CHECK: pack 0(1,%r1), 0(1) # encoding: [0xf2,0x00,0x10,0x00,0x00,0x00] +#CHECK: pack 0(1,%r15), 0(1) # encoding: [0xf2,0x00,0xf0,0x00,0x00,0x00] +#CHECK: pack 4095(1,%r1), 0(1) # encoding: [0xf2,0x00,0x1f,0xff,0x00,0x00] +#CHECK: pack 4095(1,%r15), 0(1) # encoding: [0xf2,0x00,0xff,0xff,0x00,0x00] +#CHECK: pack 0(16,%r1), 0(1) # encoding: [0xf2,0xf0,0x10,0x00,0x00,0x00] +#CHECK: pack 0(16,%r15), 0(1) # encoding: [0xf2,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: pack 0(1), 0(16,%r1) # encoding: [0xf2,0x0f,0x00,0x00,0x10,0x00] +#CHECK: pack 0(1), 0(16,%r15) # encoding: [0xf2,0x0f,0x00,0x00,0xf0,0x00] + + pack 0(1), 0(1) + pack 0(1), 0(1,%r1) + pack 0(1), 0(1,%r15) + pack 0(1), 4095(1) + pack 0(1), 4095(1,%r1) + pack 0(1), 4095(1,%r15) + pack 0(1,%r1), 0(1) + pack 0(1,%r15), 0(1) + pack 4095(1,%r1), 0(1) + pack 4095(1,%r15), 0(1) + pack 0(16,%r1), 0(1) + pack 0(16,%r15), 0(1) + pack 0(1), 0(16,%r1) + pack 0(1), 0(16,%r15) + #CHECK: pfd 0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x36] #CHECK: pfd 0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x36] #CHECK: pfd 0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x36] @@ -9369,6 +9773,58 @@ pfdrl 7, frob@PLT pfdrl 8, frob@PLT +#CHECK: pka 0, 0(1) # encoding: [0xe9,0x00,0x00,0x00,0x00,0x00] +#CHECK: pka 0, 0(1,%r1) # encoding: [0xe9,0x00,0x00,0x00,0x10,0x00] +#CHECK: pka 0, 0(1,%r15) # encoding: [0xe9,0x00,0x00,0x00,0xf0,0x00] +#CHECK: pka 0, 4095(1) # encoding: [0xe9,0x00,0x00,0x00,0x0f,0xff] +#CHECK: pka 0, 4095(1,%r1) # encoding: [0xe9,0x00,0x00,0x00,0x1f,0xff] +#CHECK: pka 0, 4095(1,%r15) # encoding: [0xe9,0x00,0x00,0x00,0xff,0xff] +#CHECK: pka 0(%r1), 0(1) # encoding: [0xe9,0x00,0x10,0x00,0x00,0x00] +#CHECK: pka 0(%r15), 0(1) # encoding: [0xe9,0x00,0xf0,0x00,0x00,0x00] +#CHECK: pka 4095(%r1), 0(1) # encoding: [0xe9,0x00,0x1f,0xff,0x00,0x00] +#CHECK: pka 4095(%r15), 0(1) # encoding: [0xe9,0x00,0xff,0xff,0x00,0x00] +#CHECK: pka 0, 0(256,%r1) # encoding: [0xe9,0xff,0x00,0x00,0x10,0x00] +#CHECK: pka 0, 0(256,%r15) # encoding: [0xe9,0xff,0x00,0x00,0xf0,0x00] + + pka 0, 0(1) + pka 0, 0(1,%r1) + pka 0, 0(1,%r15) + pka 0, 4095(1) + pka 0, 4095(1,%r1) + pka 0, 4095(1,%r15) + pka 0(%r1), 0(1) + pka 0(%r15), 0(1) + pka 4095(%r1), 0(1) + pka 4095(%r15), 0(1) + pka 0, 0(256,%r1) + pka 0, 0(256,%r15) + +#CHECK: pku 0, 0(1) # encoding: [0xe1,0x00,0x00,0x00,0x00,0x00] +#CHECK: pku 0, 0(1,%r1) # encoding: [0xe1,0x00,0x00,0x00,0x10,0x00] +#CHECK: pku 0, 0(1,%r15) # encoding: [0xe1,0x00,0x00,0x00,0xf0,0x00] +#CHECK: pku 0, 4095(1) # encoding: [0xe1,0x00,0x00,0x00,0x0f,0xff] +#CHECK: pku 0, 4095(1,%r1) # encoding: [0xe1,0x00,0x00,0x00,0x1f,0xff] +#CHECK: pku 0, 4095(1,%r15) # encoding: [0xe1,0x00,0x00,0x00,0xff,0xff] +#CHECK: pku 0(%r1), 0(1) # encoding: [0xe1,0x00,0x10,0x00,0x00,0x00] +#CHECK: pku 0(%r15), 0(1) # encoding: [0xe1,0x00,0xf0,0x00,0x00,0x00] +#CHECK: pku 4095(%r1), 0(1) # encoding: [0xe1,0x00,0x1f,0xff,0x00,0x00] +#CHECK: pku 4095(%r15), 0(1) # encoding: [0xe1,0x00,0xff,0xff,0x00,0x00] +#CHECK: pku 0, 0(256,%r1) # encoding: [0xe1,0xff,0x00,0x00,0x10,0x00] +#CHECK: pku 0, 0(256,%r15) # encoding: [0xe1,0xff,0x00,0x00,0xf0,0x00] + + pku 0, 0(1) + pku 0, 0(1,%r1) + pku 0, 0(1,%r15) + pku 0, 4095(1) + pku 0, 4095(1,%r1) + pku 0, 4095(1,%r15) + pku 0(%r1), 0(1) + pku 0(%r15), 0(1) + pku 4095(%r1), 0(1) + pku 4095(%r15), 0(1) + pku 0, 0(256,%r1) + pku 0, 0(256,%r15) + #CHECK: plo %r0, 0, %r0, 0 # encoding: [0xee,0x00,0x00,0x00,0x00,0x00] #CHECK: plo %r2, 0(%r1), %r4, 0(%r15) # encoding: [0xee,0x24,0x10,0x00,0xf0,0x00] #CHECK: plo %r2, 1(%r1), %r4, 0(%r15) # encoding: [0xee,0x24,0x10,0x01,0xf0,0x00] @@ -9962,6 +10418,36 @@ sly %r0, 524287(%r15,%r1) sly %r15, 0 +#CHECK: sp 0(1), 0(1) # encoding: [0xfb,0x00,0x00,0x00,0x00,0x00] +#CHECK: sp 0(1), 0(1,%r1) # encoding: [0xfb,0x00,0x00,0x00,0x10,0x00] +#CHECK: sp 0(1), 0(1,%r15) # encoding: [0xfb,0x00,0x00,0x00,0xf0,0x00] +#CHECK: sp 0(1), 4095(1) # encoding: [0xfb,0x00,0x00,0x00,0x0f,0xff] +#CHECK: sp 0(1), 4095(1,%r1) # encoding: [0xfb,0x00,0x00,0x00,0x1f,0xff] +#CHECK: sp 0(1), 4095(1,%r15) # encoding: [0xfb,0x00,0x00,0x00,0xff,0xff] +#CHECK: sp 0(1,%r1), 0(1) # encoding: [0xfb,0x00,0x10,0x00,0x00,0x00] +#CHECK: sp 0(1,%r15), 0(1) # encoding: [0xfb,0x00,0xf0,0x00,0x00,0x00] +#CHECK: sp 4095(1,%r1), 0(1) # encoding: [0xfb,0x00,0x1f,0xff,0x00,0x00] +#CHECK: sp 4095(1,%r15), 0(1) # encoding: [0xfb,0x00,0xff,0xff,0x00,0x00] +#CHECK: sp 0(16,%r1), 0(1) # encoding: [0xfb,0xf0,0x10,0x00,0x00,0x00] +#CHECK: sp 0(16,%r15), 0(1) # encoding: [0xfb,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: sp 0(1), 0(16,%r1) # encoding: [0xfb,0x0f,0x00,0x00,0x10,0x00] +#CHECK: sp 0(1), 0(16,%r15) # encoding: [0xfb,0x0f,0x00,0x00,0xf0,0x00] + + sp 0(1), 0(1) + sp 0(1), 0(1,%r1) + sp 0(1), 0(1,%r15) + sp 0(1), 4095(1) + sp 0(1), 4095(1,%r1) + sp 0(1), 4095(1,%r15) + sp 0(1,%r1), 0(1) + sp 0(1,%r15), 0(1) + sp 4095(1,%r1), 0(1) + sp 4095(1,%r15), 0(1) + sp 0(16,%r1), 0(1) + sp 0(16,%r15), 0(1) + sp 0(1), 0(16,%r1) + sp 0(1), 0(16,%r15) + #CHECK: spm %r0 # encoding: [0x04,0x00] #CHECK: spm %r1 # encoding: [0x04,0x10] #CHECK: spm %r15 # encoding: [0x04,0xf0] @@ -10158,6 +10644,34 @@ srnmt 4095(%r1) srnmt 4095(%r15) +#CHECK: srp 0(1), 0, 0 # encoding: [0xf0,0x00,0x00,0x00,0x00,0x00] +#CHECK: srp 0(1), 0, 15 # encoding: [0xf0,0x0f,0x00,0x00,0x00,0x00] +#CHECK: srp 0(1), 0(%r1), 0 # encoding: [0xf0,0x00,0x00,0x00,0x10,0x00] +#CHECK: srp 0(1), 0(%r15), 0 # encoding: [0xf0,0x00,0x00,0x00,0xf0,0x00] +#CHECK: srp 0(1), 4095, 0 # encoding: [0xf0,0x00,0x00,0x00,0x0f,0xff] +#CHECK: srp 0(1), 4095(%r1), 0 # encoding: [0xf0,0x00,0x00,0x00,0x1f,0xff] +#CHECK: srp 0(1), 4095(%r15), 0 # encoding: [0xf0,0x00,0x00,0x00,0xff,0xff] +#CHECK: srp 0(1,%r1), 0, 0 # encoding: [0xf0,0x00,0x10,0x00,0x00,0x00] +#CHECK: srp 0(1,%r15), 0, 0 # encoding: [0xf0,0x00,0xf0,0x00,0x00,0x00] +#CHECK: srp 4095(1,%r1), 0, 0 # encoding: [0xf0,0x00,0x1f,0xff,0x00,0x00] +#CHECK: srp 4095(1,%r15), 0, 0 # encoding: [0xf0,0x00,0xff,0xff,0x00,0x00] +#CHECK: srp 0(16,%r1), 0, 0 # encoding: [0xf0,0xf0,0x10,0x00,0x00,0x00] +#CHECK: srp 0(16,%r15), 0, 0 # encoding: [0xf0,0xf0,0xf0,0x00,0x00,0x00] + + srp 0(1), 0, 0 + srp 0(1), 0, 15 + srp 0(1), 0(%r1), 0 + srp 0(1), 0(%r15), 0 + srp 0(1), 4095, 0 + srp 0(1), 4095(%r1), 0 + srp 0(1), 4095(%r15), 0 + srp 0(1,%r1), 0, 0 + srp 0(1,%r15), 0, 0 + srp 4095(1,%r1), 0, 0 + srp 4095(1,%r15), 0, 0 + srp 0(16,%r1), 0, 0 + srp 0(16,%r15), 0, 0 + #CHECK: srst %r0, %r0 # encoding: [0xb2,0x5e,0x00,0x00] #CHECK: srst %r0, %r15 # encoding: [0xb2,0x5e,0x00,0x0f] #CHECK: srst %r15, %r0 # encoding: [0xb2,0x5e,0x00,0xf0] @@ -11029,6 +11543,22 @@ tmy 524287(%r1), 42 tmy 524287(%r15), 42 +#CHECK: tp 0(1) # encoding: [0xeb,0x00,0x00,0x00,0x00,0xc0] +#CHECK: tp 0(1,%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xc0] +#CHECK: tp 0(1,%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xc0] +#CHECK: tp 4095(1,%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x00,0xc0] +#CHECK: tp 4095(1,%r15) # encoding: [0xeb,0x00,0xff,0xff,0x00,0xc0] +#CHECK: tp 0(16,%r1) # encoding: [0xeb,0xf0,0x10,0x00,0x00,0xc0] +#CHECK: tp 0(16,%r15) # encoding: [0xeb,0xf0,0xf0,0x00,0x00,0xc0] + + tp 0(1) + tp 0(1,%r1) + tp 0(1,%r15) + tp 4095(1,%r1) + tp 4095(1,%r15) + tp 0(16,%r1) + tp 0(16,%r15) + #CHECK: tr 0(1), 0 # encoding: [0xdc,0x00,0x00,0x00,0x00,0x00] #CHECK: tr 0(1), 0(%r1) # encoding: [0xdc,0x00,0x00,0x00,0x10,0x00] #CHECK: tr 0(1), 0(%r15) # encoding: [0xdc,0x00,0x00,0x00,0xf0,0x00] @@ -11215,6 +11745,88 @@ ts 4095(%r1) ts 4095(%r15) +#CHECK: unpk 0(1), 0(1) # encoding: [0xf3,0x00,0x00,0x00,0x00,0x00] +#CHECK: unpk 0(1), 0(1,%r1) # encoding: [0xf3,0x00,0x00,0x00,0x10,0x00] +#CHECK: unpk 0(1), 0(1,%r15) # encoding: [0xf3,0x00,0x00,0x00,0xf0,0x00] +#CHECK: unpk 0(1), 4095(1) # encoding: [0xf3,0x00,0x00,0x00,0x0f,0xff] +#CHECK: unpk 0(1), 4095(1,%r1) # encoding: [0xf3,0x00,0x00,0x00,0x1f,0xff] +#CHECK: unpk 0(1), 4095(1,%r15) # encoding: [0xf3,0x00,0x00,0x00,0xff,0xff] +#CHECK: unpk 0(1,%r1), 0(1) # encoding: [0xf3,0x00,0x10,0x00,0x00,0x00] +#CHECK: unpk 0(1,%r15), 0(1) # encoding: [0xf3,0x00,0xf0,0x00,0x00,0x00] +#CHECK: unpk 4095(1,%r1), 0(1) # encoding: [0xf3,0x00,0x1f,0xff,0x00,0x00] +#CHECK: unpk 4095(1,%r15), 0(1) # encoding: [0xf3,0x00,0xff,0xff,0x00,0x00] +#CHECK: unpk 0(16,%r1), 0(1) # encoding: [0xf3,0xf0,0x10,0x00,0x00,0x00] +#CHECK: unpk 0(16,%r15), 0(1) # encoding: [0xf3,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: unpk 0(1), 0(16,%r1) # encoding: [0xf3,0x0f,0x00,0x00,0x10,0x00] +#CHECK: unpk 0(1), 0(16,%r15) # encoding: [0xf3,0x0f,0x00,0x00,0xf0,0x00] + + unpk 0(1), 0(1) + unpk 0(1), 0(1,%r1) + unpk 0(1), 0(1,%r15) + unpk 0(1), 4095(1) + unpk 0(1), 4095(1,%r1) + unpk 0(1), 4095(1,%r15) + unpk 0(1,%r1), 0(1) + unpk 0(1,%r15), 0(1) + unpk 4095(1,%r1), 0(1) + unpk 4095(1,%r15), 0(1) + unpk 0(16,%r1), 0(1) + unpk 0(16,%r15), 0(1) + unpk 0(1), 0(16,%r1) + unpk 0(1), 0(16,%r15) + +#CHECK: unpka 0(1), 0 # encoding: [0xea,0x00,0x00,0x00,0x00,0x00] +#CHECK: unpka 0(1), 0(%r1) # encoding: [0xea,0x00,0x00,0x00,0x10,0x00] +#CHECK: unpka 0(1), 0(%r15) # encoding: [0xea,0x00,0x00,0x00,0xf0,0x00] +#CHECK: unpka 0(1), 4095 # encoding: [0xea,0x00,0x00,0x00,0x0f,0xff] +#CHECK: unpka 0(1), 4095(%r1) # encoding: [0xea,0x00,0x00,0x00,0x1f,0xff] +#CHECK: unpka 0(1), 4095(%r15) # encoding: [0xea,0x00,0x00,0x00,0xff,0xff] +#CHECK: unpka 0(1,%r1), 0 # encoding: [0xea,0x00,0x10,0x00,0x00,0x00] +#CHECK: unpka 0(1,%r15), 0 # encoding: [0xea,0x00,0xf0,0x00,0x00,0x00] +#CHECK: unpka 4095(1,%r1), 0 # encoding: [0xea,0x00,0x1f,0xff,0x00,0x00] +#CHECK: unpka 4095(1,%r15), 0 # encoding: [0xea,0x00,0xff,0xff,0x00,0x00] +#CHECK: unpka 0(256,%r1), 0 # encoding: [0xea,0xff,0x10,0x00,0x00,0x00] +#CHECK: unpka 0(256,%r15), 0 # encoding: [0xea,0xff,0xf0,0x00,0x00,0x00] + + unpka 0(1), 0 + unpka 0(1), 0(%r1) + unpka 0(1), 0(%r15) + unpka 0(1), 4095 + unpka 0(1), 4095(%r1) + unpka 0(1), 4095(%r15) + unpka 0(1,%r1), 0 + unpka 0(1,%r15), 0 + unpka 4095(1,%r1), 0 + unpka 4095(1,%r15), 0 + unpka 0(256,%r1), 0 + unpka 0(256,%r15), 0 + +#CHECK: unpku 0(1), 0 # encoding: [0xe2,0x00,0x00,0x00,0x00,0x00] +#CHECK: unpku 0(1), 0(%r1) # encoding: [0xe2,0x00,0x00,0x00,0x10,0x00] +#CHECK: unpku 0(1), 0(%r15) # encoding: [0xe2,0x00,0x00,0x00,0xf0,0x00] +#CHECK: unpku 0(1), 4095 # encoding: [0xe2,0x00,0x00,0x00,0x0f,0xff] +#CHECK: unpku 0(1), 4095(%r1) # encoding: [0xe2,0x00,0x00,0x00,0x1f,0xff] +#CHECK: unpku 0(1), 4095(%r15) # encoding: [0xe2,0x00,0x00,0x00,0xff,0xff] +#CHECK: unpku 0(1,%r1), 0 # encoding: [0xe2,0x00,0x10,0x00,0x00,0x00] +#CHECK: unpku 0(1,%r15), 0 # encoding: [0xe2,0x00,0xf0,0x00,0x00,0x00] +#CHECK: unpku 4095(1,%r1), 0 # encoding: [0xe2,0x00,0x1f,0xff,0x00,0x00] +#CHECK: unpku 4095(1,%r15), 0 # encoding: [0xe2,0x00,0xff,0xff,0x00,0x00] +#CHECK: unpku 0(256,%r1), 0 # encoding: [0xe2,0xff,0x10,0x00,0x00,0x00] +#CHECK: unpku 0(256,%r15), 0 # encoding: [0xe2,0xff,0xf0,0x00,0x00,0x00] + + unpku 0(1), 0 + unpku 0(1), 0(%r1) + unpku 0(1), 0(%r15) + unpku 0(1), 4095 + unpku 0(1), 4095(%r1) + unpku 0(1), 4095(%r15) + unpku 0(1,%r1), 0 + unpku 0(1,%r15), 0 + unpku 4095(1,%r1), 0 + unpku 4095(1,%r15), 0 + unpku 0(256,%r1), 0 + unpku 0(256,%r15), 0 + #CHECK: x %r0, 0 # encoding: [0x57,0x00,0x00,0x00] #CHECK: x %r0, 4095 # encoding: [0x57,0x00,0x0f,0xff] #CHECK: x %r0, 0(%r1) # encoding: [0x57,0x00,0x10,0x00] @@ -11374,3 +11986,33 @@ xy %r0, 524287(%r1,%r15) xy %r0, 524287(%r15,%r1) xy %r15, 0 + +#CHECK: zap 0(1), 0(1) # encoding: [0xf8,0x00,0x00,0x00,0x00,0x00] +#CHECK: zap 0(1), 0(1,%r1) # encoding: [0xf8,0x00,0x00,0x00,0x10,0x00] +#CHECK: zap 0(1), 0(1,%r15) # encoding: [0xf8,0x00,0x00,0x00,0xf0,0x00] +#CHECK: zap 0(1), 4095(1) # encoding: [0xf8,0x00,0x00,0x00,0x0f,0xff] +#CHECK: zap 0(1), 4095(1,%r1) # encoding: [0xf8,0x00,0x00,0x00,0x1f,0xff] +#CHECK: zap 0(1), 4095(1,%r15) # encoding: [0xf8,0x00,0x00,0x00,0xff,0xff] +#CHECK: zap 0(1,%r1), 0(1) # encoding: [0xf8,0x00,0x10,0x00,0x00,0x00] +#CHECK: zap 0(1,%r15), 0(1) # encoding: [0xf8,0x00,0xf0,0x00,0x00,0x00] +#CHECK: zap 4095(1,%r1), 0(1) # encoding: [0xf8,0x00,0x1f,0xff,0x00,0x00] +#CHECK: zap 4095(1,%r15), 0(1) # encoding: [0xf8,0x00,0xff,0xff,0x00,0x00] +#CHECK: zap 0(16,%r1), 0(1) # encoding: [0xf8,0xf0,0x10,0x00,0x00,0x00] +#CHECK: zap 0(16,%r15), 0(1) # encoding: [0xf8,0xf0,0xf0,0x00,0x00,0x00] +#CHECK: zap 0(1), 0(16,%r1) # encoding: [0xf8,0x0f,0x00,0x00,0x10,0x00] +#CHECK: zap 0(1), 0(16,%r15) # encoding: [0xf8,0x0f,0x00,0x00,0xf0,0x00] + + zap 0(1), 0(1) + zap 0(1), 0(1,%r1) + zap 0(1), 0(1,%r15) + zap 0(1), 4095(1) + zap 0(1), 4095(1,%r1) + zap 0(1), 4095(1,%r15) + zap 0(1,%r1), 0(1) + zap 0(1,%r15), 0(1) + zap 4095(1,%r1), 0(1) + zap 4095(1,%r15), 0(1) + zap 0(16,%r1), 0(1) + zap 0(16,%r15), 0(1) + zap 0(1), 0(16,%r1) + zap 0(1), 0(16,%r15)