From: Aaron Ballman <aaron@aaronballman.com>
Date: Wed, 25 Feb 2015 13:05:24 +0000 (+0000)
Subject: Silencing a "result of 32-bit shift implicitly converted to 64 bits (was 64-bit shift... 
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=3cecbeccf2ecfc1511fec99f0cd7ee5fcad94266;p=llvm

Silencing a "result of 32-bit shift implicitly converted to 64 bits (was 64-bit shift intended?)" warning in MSVC; NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230489 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 567cd2aa0e4..4f3a625633f 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9987,7 +9987,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
                 isa<ConstantSDNode>(UI->getOperand(1)) &&
                 (cast<ConstantSDNode>(Add->getOperand(1))->getZExtValue() -
                  cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) %
-                (1 << Bits) == 0) {
+                (1ULL << Bits) == 0) {
               SDNode *OtherAdd = *UI;
               for (SDNode::use_iterator VI = OtherAdd->use_begin(),
                    VE = OtherAdd->use_end(); VI != VE; ++VI) {