From: Ivan Grokhotkov <ivan@espressif.com>
Date: Tue, 21 Feb 2017 04:10:49 +0000 (+0800)
Subject: bootloader: disconnect VRTC from SAR input in bootloader_random_disable
X-Git-Tag: v2.0-rc2~41^2~2
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=3b583c150f672f7414b9c35b84d219237a2d4afb;p=esp-idf

bootloader: disconnect VRTC from SAR input in bootloader_random_disable

Bootloader enables SAR ADC in test mode to get some entropy for the RNG.
The bits which control the ADC test mux were not disabled, which caused
extra ~24uA current to be drawn from VRTC, increasing deep sleep current
consumption. This change disables relevant test mode bits in
bootloader_random_disable.
---

diff --git a/components/bootloader_support/src/bootloader_random.c b/components/bootloader_support/src/bootloader_random.c
index b58ebe941d..5a00d0cf5a 100644
--- a/components/bootloader_support/src/bootloader_random.c
+++ b/components/bootloader_support/src/bootloader_random.c
@@ -135,4 +135,8 @@ void bootloader_random_disable(void)
     /* Reset i2s peripheral */
     SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
     CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
+
+    /* Disable pull supply voltage to SAR ADC */
+    CLEAR_PERI_REG_MASK(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_ENT_RTC);
+    SET_PERI_REG_BITS(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_DTEST_RTC, 0, RTC_CNTL_DTEST_RTC_S);
 }