From: Ivan Maidanski Date: Wed, 2 Nov 2016 22:05:01 +0000 (+0300) Subject: Fix 'visibility' of some CPU-specific internal macros X-Git-Tag: v7.4.6~73 X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=3b26a6b1a5236ef5119ddb46572eb4ad8d9299de;p=libatomic_ops Fix 'visibility' of some CPU-specific internal macros (Cherry-pick commit 9b7cecb from 'master' branch.) Undefine internal macros that are defined and used solely in a single CPU-specific file. * src/atomic_ops/sysdeps/gcc/arm.h (AO_THUMB_GO_ARM, AO_THUMB_RESTORE_MODE, AO_THUMB_SWITCH_CLOBBERS): Undefine at the end of file. * src/atomic_ops/sysdeps/gcc/hppa.h (AO_PA_LDCW_ALIGNMENT, AO_ldcw, AO_ldcw_align): Likewise. * src/atomic_ops/sysdeps/gcc/ia64.h (AO_IN_ADDR, AO_LEN, AO_MASK, AO_OUT_ADDR, AO_SWIZZLE): Likewise. * src/atomic_ops/sysdeps/gcc/mips.h (AO_MIPS_LL): Likewise. * src/atomic_ops/sysdeps/hpc/hppa.h (AO_PA_LDCW_ALIGNMENT, AO_ldcw, AO_ldcw_align): Likewise. * src/atomic_ops/sysdeps/hpc/ia64.h (AO_T_FASIZE, AO_T_SIZE): Likewise. * src/atomic_ops/sysdeps/icc/ia64.h (AO_INTEL_PTR_t): Likewise. --- diff --git a/src/atomic_ops/sysdeps/gcc/arm.h b/src/atomic_ops/sysdeps/gcc/arm.h index c19f6da..5f02cbc 100644 --- a/src/atomic_ops/sysdeps/gcc/arm.h +++ b/src/atomic_ops/sysdeps/gcc/arm.h @@ -599,3 +599,7 @@ AO_fetch_compare_and_swap(volatile AO_t *addr, AO_t old_val, AO_t new_val) #endif /* !AO_HAVE_test_and_set[_full] && AO_ARM_HAVE_SWP */ #define AO_T_IS_INT + +#undef AO_THUMB_GO_ARM +#undef AO_THUMB_RESTORE_MODE +#undef AO_THUMB_SWITCH_CLOBBERS diff --git a/src/atomic_ops/sysdeps/gcc/hppa.h b/src/atomic_ops/sysdeps/gcc/hppa.h index d36f582..ae1c315 100644 --- a/src/atomic_ops/sysdeps/gcc/hppa.h +++ b/src/atomic_ops/sysdeps/gcc/hppa.h @@ -87,3 +87,7 @@ AO_pa_clear(volatile AO_TS_t * addr) *a = 1; } #define AO_CLEAR(addr) AO_pa_clear(addr) + +#undef AO_PA_LDCW_ALIGNMENT +#undef AO_ldcw +#undef AO_ldcw_align diff --git a/src/atomic_ops/sysdeps/gcc/ia64.h b/src/atomic_ops/sysdeps/gcc/ia64.h index f5549fe..98627d5 100644 --- a/src/atomic_ops/sysdeps/gcc/ia64.h +++ b/src/atomic_ops/sysdeps/gcc/ia64.h @@ -279,3 +279,9 @@ AO_short_fetch_compare_and_swap_release(volatile unsigned short *addr, /* TODO: Add compare_and_swap_double as soon as there is widely */ /* available hardware that implements it. */ + +#undef AO_IN_ADDR +#undef AO_LEN +#undef AO_MASK +#undef AO_OUT_ADDR +#undef AO_SWIZZLE diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h index 521c38a..6f129cd 100644 --- a/src/atomic_ops/sysdeps/gcc/mips.h +++ b/src/atomic_ops/sysdeps/gcc/mips.h @@ -175,6 +175,7 @@ AO_fetch_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val) /* generated automatically (and AO_int_... primitives are */ /* defined properly after the first generalization pass). */ +#undef AO_MIPS_LL #undef AO_MIPS_LL_1 #undef AO_MIPS_SC #undef AO_MIPS_SET_ISA diff --git a/src/atomic_ops/sysdeps/hpc/hppa.h b/src/atomic_ops/sysdeps/hpc/hppa.h index 4e27eb2..f2f1dcf 100644 --- a/src/atomic_ops/sysdeps/hpc/hppa.h +++ b/src/atomic_ops/sysdeps/hpc/hppa.h @@ -94,3 +94,7 @@ AO_pa_clear(volatile AO_TS_t * addr) *a = 1; } #define AO_CLEAR(addr) AO_pa_clear(addr) + +#undef AO_PA_LDCW_ALIGNMENT +#undef AO_ldcw +#undef AO_ldcw_align diff --git a/src/atomic_ops/sysdeps/hpc/ia64.h b/src/atomic_ops/sysdeps/hpc/ia64.h index 6391eda..e71f5e8 100644 --- a/src/atomic_ops/sysdeps/hpc/ia64.h +++ b/src/atomic_ops/sysdeps/hpc/ia64.h @@ -153,3 +153,6 @@ AO_short_fetch_compare_and_swap_release(volatile unsigned short *addr, #ifndef __LP64__ # define AO_T_IS_INT #endif + +#undef AO_T_FASIZE +#undef AO_T_SIZE diff --git a/src/atomic_ops/sysdeps/icc/ia64.h b/src/atomic_ops/sysdeps/icc/ia64.h index b43a501..6654209 100644 --- a/src/atomic_ops/sysdeps/icc/ia64.h +++ b/src/atomic_ops/sysdeps/icc/ia64.h @@ -203,3 +203,5 @@ AO_int_fetch_compare_and_swap_release(volatile unsigned int *addr, return _InterlockedCompareExchange_rel(addr, new_val, old_val); } #define AO_HAVE_int_fetch_compare_and_swap_release + +#undef AO_INTEL_PTR_t