From: Dmitry V. Levin Date: Wed, 23 Oct 2019 23:31:26 +0000 (+0000) Subject: bfin, csky, m68k, sh: fix build regression X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=38be73781fb7b61760967d82514184c82b17bf4a;p=strace bfin, csky, m68k, sh: fix build regression * xlat/cacheflush_flags.in: New file. * cacheflush.c [M68K || BFIN || CSKY || SH] (cacheflush_flags): Remove, include "xlat/cacheflush_flags.h" instead. Fixes: v5.3~105 "Add xlat description structure" --- diff --git a/cacheflush.c b/cacheflush.c index ac53745e..64030507 100644 --- a/cacheflush.c +++ b/cacheflush.c @@ -18,19 +18,7 @@ #ifdef M68K # include "xlat/cacheflush_scope.h" - -static const struct xlat cacheflush_flags[] = { -# ifdef FLUSH_CACHE_BOTH - XLAT(FLUSH_CACHE_BOTH), -# endif -# ifdef FLUSH_CACHE_DATA - XLAT(FLUSH_CACHE_DATA), -# endif -# ifdef FLUSH_CACHE_INSN - XLAT(FLUSH_CACHE_INSN), -# endif - XLAT_END -}; +# include "xlat/cacheflush_flags.h" SYS_FUNC(cacheflush) { @@ -50,12 +38,7 @@ SYS_FUNC(cacheflush) #endif /* M68K */ #if defined(BFIN) || defined(CSKY) -static const struct xlat cacheflush_flags[] = { - XLAT(ICACHE), - XLAT(DCACHE), - XLAT(BCACHE), - XLAT_END -}; +# include "xlat/cacheflush_flags.h" SYS_FUNC(cacheflush) { @@ -71,21 +54,7 @@ SYS_FUNC(cacheflush) #endif /* BFIN || CSKY */ #ifdef SH -static const struct xlat cacheflush_flags[] = { -# ifdef CACHEFLUSH_D_INVAL - XLAT(CACHEFLUSH_D_INVAL), -# endif -# ifdef CACHEFLUSH_D_WB - XLAT(CACHEFLUSH_D_WB), -# endif -# ifdef CACHEFLUSH_D_PURGE - XLAT(CACHEFLUSH_D_PURGE), -# endif -# ifdef CACHEFLUSH_I - XLAT(CACHEFLUSH_I), -# endif - XLAT_END -}; +# include "xlat/cacheflush_flags.h" SYS_FUNC(cacheflush) { diff --git a/xlat/cacheflush_flags.in b/xlat/cacheflush_flags.in new file mode 100644 index 00000000..06ed0d6c --- /dev/null +++ b/xlat/cacheflush_flags.in @@ -0,0 +1,21 @@ +#if defined M68K + +FLUSH_CACHE_BOTH 3 +FLUSH_CACHE_DATA 1 +FLUSH_CACHE_INSN 2 + +#elif defined BFIN || defined CSKY + +BCACHE 3 +ICACHE 1 +DCACHE 2 + +#elif defined SH + +BCACHE 7 +ICACHE 4 +DCACHE 3 +CACHEFLUSH_D_INVAL 1 +CACHEFLUSH_D_WB 2 + +#endif