From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Thu, 6 Oct 2016 17:08:01 +0000 (+0000)
Subject: Revert "AMDGPU: Support using tablegened MC pseudo expansions"
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=37a12595eac9054e79b6aca3a7190ed4a3b822ab;p=llvm

Revert "AMDGPU: Support using tablegened MC pseudo expansions"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283469 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 7ad34f4db1d..ef20047377f 100644
--- a/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -93,7 +93,7 @@ extern "C" void LLVMInitializeAMDGPUAsmPrinter() {
 
 AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM,
                                    std::unique_ptr<MCStreamer> Streamer)
-  : AsmPrinter(TM, std::move(Streamer)) {}
+    : AsmPrinter(TM, std::move(Streamer)) {}
 
 StringRef AMDGPUAsmPrinter::getPassName() const {
   return "AMDGPU Assembly Printer";
diff --git a/lib/Target/AMDGPU/AMDGPUAsmPrinter.h b/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
index 65e581d2582..3964d43a738 100644
--- a/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
+++ b/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
@@ -15,13 +15,10 @@
 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
 
-#include "AMDGPUMCInstLower.h"
-
 #include "llvm/CodeGen/AsmPrinter.h"
 #include <vector>
 
 namespace llvm {
-class MCOperand;
 
 class AMDGPUAsmPrinter final : public AsmPrinter {
 private:
@@ -123,15 +120,6 @@ public:
 
   StringRef getPassName() const override;
 
-  /// \brief Wrapper for MCInstLowering.lowerOperand() for the tblgen'erated
-  /// pseudo lowering.
-  bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
-
-  /// \brief tblgen'erated driver function for lowering simple MI->MC pseudo
-  /// instructions.
-  bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
-                                   const MachineInstr *MI);
-
   /// Implemented in AMDGPUMCInstLower.cpp
   void EmitInstruction(const MachineInstr *MI) override;
 
diff --git a/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp b/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
index 1521442c262..5697a5f09ca 100644
--- a/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+++ b/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
@@ -36,9 +36,6 @@
 
 using namespace llvm;
 
-#include "AMDGPUGenMCPseudoLowering.inc"
-
-
 AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st,
                                      const AsmPrinter &ap):
   Ctx(ctx), ST(st), AP(ap) { }
@@ -71,43 +68,6 @@ const MCExpr *AMDGPUMCInstLower::getLongBranchBlockExpr(
   return MCBinaryExpr::createSub(SrcBBSym, DestBBSym, Ctx);
 }
 
-bool AMDGPUMCInstLower::lowerOperand(const MachineOperand &MO,
-                                     MCOperand &MCOp) const {
-  switch (MO.getType()) {
-  default:
-    llvm_unreachable("unknown operand type");
-  case MachineOperand::MO_Immediate:
-    MCOp = MCOperand::createImm(MO.getImm());
-    return true;
-  case MachineOperand::MO_Register:
-    MCOp = MCOperand::createReg(AMDGPU::getMCReg(MO.getReg(), ST));
-    return true;
-  case MachineOperand::MO_MachineBasicBlock:
-    MCOp = MCOperand::createExpr(MCSymbolRefExpr::create(
-                                   MO.getMBB()->getSymbol(), Ctx));
-    return true;
-  case MachineOperand::MO_GlobalAddress: {
-    const GlobalValue *GV = MO.getGlobal();
-    SmallString<128> SymbolName;
-    AP.getNameWithPrefix(SymbolName, GV);
-    MCSymbol *Sym = Ctx.getOrCreateSymbol(SymbolName);
-    const MCExpr *SymExpr =
-      MCSymbolRefExpr::create(Sym, getVariantKind(MO.getTargetFlags()),Ctx);
-    const MCExpr *Expr = MCBinaryExpr::createAdd(SymExpr,
-      MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
-    MCOp = MCOperand::createExpr(Expr);
-    return true;
-  }
-  case MachineOperand::MO_ExternalSymbol: {
-    MCSymbol *Sym = Ctx.getOrCreateSymbol(StringRef(MO.getSymbolName()));
-    Sym->setExternal(true);
-    const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
-    MCOp = MCOperand::createExpr(Expr);
-    return true;
-  }
-  }
-}
-
 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
 
   int MCOpcode = ST.getInstrInfo()->pseudoToMCOpcode(MI->getOpcode());
@@ -122,22 +82,54 @@ void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
 
   for (const MachineOperand &MO : MI->explicit_operands()) {
     MCOperand MCOp;
-    lowerOperand(MO, MCOp);
+    switch (MO.getType()) {
+    default:
+      llvm_unreachable("unknown operand type");
+    case MachineOperand::MO_Immediate:
+      MCOp = MCOperand::createImm(MO.getImm());
+      break;
+    case MachineOperand::MO_Register:
+      MCOp = MCOperand::createReg(AMDGPU::getMCReg(MO.getReg(), ST));
+      break;
+    case MachineOperand::MO_MachineBasicBlock:
+      if (MO.getTargetFlags() != 0) {
+        MCOp = MCOperand::createExpr(
+          getLongBranchBlockExpr(*MI->getParent(), MO));
+      } else {
+        MCOp = MCOperand::createExpr(
+          MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), Ctx));
+      }
+
+      break;
+    case MachineOperand::MO_GlobalAddress: {
+      const GlobalValue *GV = MO.getGlobal();
+      SmallString<128> SymbolName;
+      AP.getNameWithPrefix(SymbolName, GV);
+      MCSymbol *Sym = Ctx.getOrCreateSymbol(SymbolName);
+      const MCExpr *SymExpr =
+          MCSymbolRefExpr::create(Sym, getVariantKind(MO.getTargetFlags()),Ctx);
+      const MCExpr *Expr = MCBinaryExpr::createAdd(SymExpr,
+          MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
+      MCOp = MCOperand::createExpr(Expr);
+      break;
+    }
+    case MachineOperand::MO_ExternalSymbol: {
+      MCSymbol *Sym = Ctx.getOrCreateSymbol(StringRef(MO.getSymbolName()));
+      Sym->setExternal(true);
+      const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
+      MCOp = MCOperand::createExpr(Expr);
+      break;
+    }
+    case MachineOperand::MO_MCSymbol:
+      MCOp = MCOperand::createExpr(
+        MCSymbolRefExpr::create(MO.getMCSymbol(), Ctx));
+      break;
+    }
     OutMI.addOperand(MCOp);
   }
 }
 
-bool AMDGPUAsmPrinter::lowerOperand(const MachineOperand &MO,
-                                    MCOperand &MCOp) const {
-  const AMDGPUSubtarget &STI = MF->getSubtarget<AMDGPUSubtarget>();
-  AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
-  return MCInstLowering.lowerOperand(MO, MCOp);
-}
-
 void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
-  if (emitPseudoExpansionLowering(*OutStreamer, MI))
-    return;
-
   const AMDGPUSubtarget &STI = MF->getSubtarget<AMDGPUSubtarget>();
   AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
 
diff --git a/lib/Target/AMDGPU/AMDGPUMCInstLower.h b/lib/Target/AMDGPU/AMDGPUMCInstLower.h
index 57d2d85daec..8cedda6a706 100644
--- a/lib/Target/AMDGPU/AMDGPUMCInstLower.h
+++ b/lib/Target/AMDGPU/AMDGPUMCInstLower.h
@@ -20,7 +20,6 @@ class MachineOperand;
 class MCContext;
 class MCExpr;
 class MCInst;
-class MCOperand;
 
 class AMDGPUMCInstLower {
   MCContext &Ctx;
@@ -34,8 +33,6 @@ public:
   AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &ST,
                     const AsmPrinter &AP);
 
-  bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
-
   /// \brief Lower a MachineInstr to an MCInst
   void lower(const MachineInstr *MI, MCInst &OutMI) const;
 
diff --git a/lib/Target/AMDGPU/CMakeLists.txt b/lib/Target/AMDGPU/CMakeLists.txt
index ae54fa34ec5..ae8862fd1bb 100644
--- a/lib/Target/AMDGPU/CMakeLists.txt
+++ b/lib/Target/AMDGPU/CMakeLists.txt
@@ -11,7 +11,6 @@ tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
 add_public_tablegen_target(AMDGPUCommonTableGen)
 
 # List of all GlobalISel files.