From: Craig Topper Date: Sun, 14 Apr 2019 04:20:38 +0000 (+0000) Subject: [X86] Remove some unused tablegen multiclasses. NFC X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=37569f61189a123f8da9d878502548ce601cfe55;p=llvm [X86] Remove some unused tablegen multiclasses. NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358345 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index 47b808a6b62..6e6c8f10c09 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -394,33 +394,6 @@ multiclass AVX512_maskable_cmp O, Format F, X86VectorVTInfo _, OpcodeStr, AttSrcAsm, IntelSrcAsm, RHS, (and _.KRCWM:$mask, RHS), IsCommutable>; -multiclass AVX512_maskable_cmp_alt O, Format F, X86VectorVTInfo _, - dag Outs, dag Ins, string OpcodeStr, - string AttSrcAsm, string IntelSrcAsm> : - AVX512_maskable_custom_cmp; - -// This multiclass generates the unconditional/non-masking, the masking and -// the zero-masking variant of the vector instruction. In the masking case, the -// perserved vector elements come from a new dummy input operand tied to $dst. -multiclass AVX512_maskable_logic O, Format F, X86VectorVTInfo _, - dag Outs, dag Ins, string OpcodeStr, - string AttSrcAsm, string IntelSrcAsm, - dag RHS, dag MaskedRHS, - bit IsCommutable = 0, SDNode Select = vselect> : - AVX512_maskable_custom; - // Alias instruction that maps zero vector to pxor / xorp* for AVX-512. // This is expanded by ExpandPostRAPseudos to an xorps / vxorps, and then