From: Craig Topper <craig.topper@intel.com>
Date: Sat, 28 Oct 2017 05:52:23 +0000 (+0000)
Subject: [X86] Remove unneeded MVT::i1 related code from fast isel.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=3445b0012851460e83ea3f77630011271071c7b3;p=llvm

[X86] Remove unneeded MVT::i1 related code from fast isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316825 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index 9c81be1622a..32f03998a60 100644
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -3512,16 +3512,6 @@ bool X86FastISel::fastLowerCall(CallLoweringInfo &CLI) {
       report_fatal_error("SSE register return with SSE disabled");
     }
 
-    // If the return value is an i1 and AVX-512 is enabled, we need
-    // to do a fixup to make the copy legal.
-    if (CopyVT == MVT::i1 && SrcReg == X86::AL && Subtarget->hasAVX512()) {
-      // Need to copy to a GR32 first.
-      // TODO: MOVZX isn't great here. We don't care about the upper bits.
-      SrcReg = createResultReg(&X86::GR32RegClass);
-      BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
-              TII.get(X86::MOVZX32rr8), SrcReg).addReg(X86::AL);
-    }
-
     // If we prefer to use the value in xmm registers, copy it out as f80 and
     // use a truncate to move it from fp stack reg to xmm reg.
     if ((SrcReg == X86::FP0 || SrcReg == X86::FP1) &&