From: Mahavir Jain <mahavir@espressif.com>
Date: Wed, 6 Dec 2017 06:35:11 +0000 (+0530)
Subject: docs: fix i2s code snippet for interrupt flags setting
X-Git-Tag: v3.1-beta1~554^2
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=2efef48e3ef06239736601bfec60f8ec6ab7209d;p=esp-idf

docs: fix i2s code snippet for interrupt flags setting

Signed-off-by: Mahavir Jain <mahavir@espressif.com>
---

diff --git a/components/esp32/include/esp_intr_alloc.h b/components/esp32/include/esp_intr_alloc.h
index ad121abb39..02ddac57ef 100644
--- a/components/esp32/include/esp_intr_alloc.h
+++ b/components/esp32/include/esp_intr_alloc.h
@@ -37,13 +37,13 @@ extern "C" {
  */
 
 //Keep the LEVELx values as they are here; they match up with (1<<level)
-#define ESP_INTR_FLAG_LEVEL1		(1<<1)	///< Accept a Level 1 interrupt vector
+#define ESP_INTR_FLAG_LEVEL1		(1<<1)	///< Accept a Level 1 interrupt vector (lowest priority)
 #define ESP_INTR_FLAG_LEVEL2		(1<<2)	///< Accept a Level 2 interrupt vector
 #define ESP_INTR_FLAG_LEVEL3		(1<<3)	///< Accept a Level 3 interrupt vector
 #define ESP_INTR_FLAG_LEVEL4		(1<<4)	///< Accept a Level 4 interrupt vector
 #define ESP_INTR_FLAG_LEVEL5		(1<<5)	///< Accept a Level 5 interrupt vector
 #define ESP_INTR_FLAG_LEVEL6		(1<<6)	///< Accept a Level 6 interrupt vector
-#define ESP_INTR_FLAG_NMI			(1<<7)	///< Accept a Level 7 interrupt vector
+#define ESP_INTR_FLAG_NMI			(1<<7)	///< Accept a Level 7 interrupt vector (highest priority)
 #define ESP_INTR_FLAG_SHARED		(1<<8)	///< Interrupt can be shared between ISRs
 #define ESP_INTR_FLAG_EDGE			(1<<9)	///< Edge-triggered interrupt
 #define ESP_INTR_FLAG_IRAM			(1<<10)	///< ISR can be called if cache is disabled
diff --git a/docs/api-reference/peripherals/i2s.rst b/docs/api-reference/peripherals/i2s.rst
index 0ec2840e82..ccd817c55e 100644
--- a/docs/api-reference/peripherals/i2s.rst
+++ b/docs/api-reference/peripherals/i2s.rst
@@ -34,11 +34,10 @@ Short example of I2S configuration:
          .bits_per_sample = 16,
          .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
          .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
-         .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, // high interrupt priority
+         .intr_alloc_flags = 0, // default interrupt priority
          .dma_buf_count = 8,
          .dma_buf_len = 64,
-         .use_apll = 0,
-         .apll_param = I2S_APLL_NONE
+         .use_apll = 0
     };
 
     static const i2s_pin_config_t pin_config = {
@@ -71,9 +70,10 @@ Short example configuring I2S to use internal DAC for analog output::
          .bits_per_sample = 16, /* the DAC module will only take the 8bits from MSB */
          .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
          .communication_format = I2S_COMM_FORMAT_I2S_MSB,
-         .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, // high interrupt priority
+         .intr_alloc_flags = 0, // default interrupt priority
          .dma_buf_count = 8,
-         .dma_buf_len = 64
+         .dma_buf_len = 64,
+         .use_apll = 0
     };
 
     ...