From: Simon Atanasyan <simon@atanasyan.com>
Date: Wed, 17 Jul 2019 08:11:40 +0000 (+0000)
Subject: [mips] Use mult/mflo pattern on 64-bit targets prior to MIPS64
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=2e245309ed766cf08c96f2660b1396d5a9135354;p=llvm

[mips] Use mult/mflo pattern on 64-bit targets prior to MIPS64

The `MUL` instruction is available starting from the MIPS32/MIPS64 targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366301 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td
index b5711004f70..7f35280f793 100644
--- a/lib/Target/Mips/Mips64InstrInfo.td
+++ b/lib/Target/Mips/Mips64InstrInfo.td
@@ -853,7 +853,7 @@ def : MipsPat<(i64 (sext (i32 (sub GPR32:$src, GPR32:$src2)))),
               (SUBu GPR32:$src, GPR32:$src2), sub_32)>;
 def : MipsPat<(i64 (sext (i32 (mul GPR32:$src, GPR32:$src2)))),
               (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
-              (MUL GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS3_NOT_32R6_64R6;
+              (MUL GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS32_NOT_32R6_64R6;
 def : MipsPat<(i64 (sext (i32 (MipsMFHI ACC64:$src)))),
               (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
               (PseudoMFHI ACC64:$src), sub_32)>;
diff --git a/test/CodeGen/Mips/llvm-ir/mul.ll b/test/CodeGen/Mips/llvm-ir/mul.ll
index b6f535abdee..c75bda3f394 100644
--- a/test/CodeGen/Mips/llvm-ir/mul.ll
+++ b/test/CodeGen/Mips/llvm-ir/mul.ll
@@ -155,6 +155,9 @@ entry:
   ; M2:         mult    $4, $5
   ; M2:         mflo    $2
 
+  ; M4:         mult    $4, $5
+  ; M4:         mflo    $1
+
   ; 32R1-R5:    mul     $2, $4, $5
   ; 32R6:       mul     $2, $4, $5