From: Matt Arsenault Date: Fri, 8 Feb 2019 19:59:32 +0000 (+0000) Subject: AMDGPU: Eliminate GPU specific SubtargetFeatures X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=2d5a72336b407dc7790900d2ea266a72a985810b;p=llvm AMDGPU: Eliminate GPU specific SubtargetFeatures Inline compatability is determined from the individual feature bits. These are just sets of the separate features, but will always be treated as incompatible unless they are specifically ignored. Defining the ISA version number here in tablegen would be nice, but it turns out this wasn't actually used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353558 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/AMDGPU/AMDGPU.td b/lib/Target/AMDGPU/AMDGPU.td index 761668be11c..c67d203d35d 100644 --- a/lib/Target/AMDGPU/AMDGPU.td +++ b/lib/Target/AMDGPU/AMDGPU.td @@ -474,47 +474,50 @@ class SubtargetFeatureISAVersion ; -def FeatureISAVersion6_0_0 : SubtargetFeatureISAVersion <6,0,0, - [FeatureSouthernIslands, +class FeatureSet Features_> { + list Features = Features_; +} + +def FeatureISAVersion6_0_0 : FeatureSet<[FeatureSouthernIslands, FeatureFastFMAF32, HalfRate64Ops, FeatureLDSBankCount32, FeatureCodeObjectV3]>; -def FeatureISAVersion6_0_1 : SubtargetFeatureISAVersion <6,0,1, +def FeatureISAVersion6_0_1 : FeatureSet< [FeatureSouthernIslands, FeatureLDSBankCount32, FeatureCodeObjectV3]>; -def FeatureISAVersion7_0_0 : SubtargetFeatureISAVersion <7,0,0, +def FeatureISAVersion7_0_0 : FeatureSet< [FeatureSeaIslands, FeatureLDSBankCount32, FeatureCodeObjectV3]>; -def FeatureISAVersion7_0_1 : SubtargetFeatureISAVersion <7,0,1, +def FeatureISAVersion7_0_1 : FeatureSet< [FeatureSeaIslands, HalfRate64Ops, FeatureLDSBankCount32, FeatureFastFMAF32, FeatureCodeObjectV3]>; -def FeatureISAVersion7_0_2 : SubtargetFeatureISAVersion <7,0,2, +def FeatureISAVersion7_0_2 : FeatureSet< [FeatureSeaIslands, FeatureLDSBankCount16, FeatureFastFMAF32, FeatureCodeObjectV3]>; -def FeatureISAVersion7_0_3 : SubtargetFeatureISAVersion <7,0,3, +def FeatureISAVersion7_0_3 : FeatureSet< [FeatureSeaIslands, FeatureLDSBankCount16, FeatureCodeObjectV3]>; -def FeatureISAVersion7_0_4 : SubtargetFeatureISAVersion <7,0,4, +def FeatureISAVersion7_0_4 : FeatureSet< [FeatureSeaIslands, FeatureLDSBankCount32, FeatureCodeObjectV3]>; -def FeatureISAVersion8_0_1 : SubtargetFeatureISAVersion <8,0,1, +def FeatureISAVersion8_0_1 : FeatureSet< [FeatureVolcanicIslands, FeatureFastFMAF32, HalfRate64Ops, @@ -523,45 +526,45 @@ def FeatureISAVersion8_0_1 : SubtargetFeatureISAVersion <8,0,1, FeatureUnpackedD16VMem, FeatureCodeObjectV3]>; -def FeatureISAVersion8_0_2 : SubtargetFeatureISAVersion <8,0,2, +def FeatureISAVersion8_0_2 : FeatureSet< [FeatureVolcanicIslands, FeatureLDSBankCount32, FeatureSGPRInitBug, FeatureUnpackedD16VMem, FeatureCodeObjectV3]>; -def FeatureISAVersion8_0_3 : SubtargetFeatureISAVersion <8,0,3, +def FeatureISAVersion8_0_3 : FeatureSet< [FeatureVolcanicIslands, FeatureLDSBankCount32, FeatureUnpackedD16VMem, FeatureCodeObjectV3]>; -def FeatureISAVersion8_1_0 : SubtargetFeatureISAVersion <8,1,0, +def FeatureISAVersion8_1_0 : FeatureSet< [FeatureVolcanicIslands, FeatureLDSBankCount16, FeatureXNACK, FeatureCodeObjectV3]>; -def FeatureISAVersion9_0_0 : SubtargetFeatureISAVersion <9,0,0, +def FeatureISAVersion9_0_0 : FeatureSet< [FeatureGFX9, FeatureMadMixInsts, FeatureLDSBankCount32, FeatureCodeObjectV3]>; -def FeatureISAVersion9_0_2 : SubtargetFeatureISAVersion <9,0,2, +def FeatureISAVersion9_0_2 : FeatureSet< [FeatureGFX9, FeatureMadMixInsts, FeatureLDSBankCount32, FeatureXNACK, FeatureCodeObjectV3]>; -def FeatureISAVersion9_0_4 : SubtargetFeatureISAVersion <9,0,4, +def FeatureISAVersion9_0_4 : FeatureSet< [FeatureGFX9, FeatureLDSBankCount32, FeatureFmaMixInsts, FeatureCodeObjectV3]>; -def FeatureISAVersion9_0_6 : SubtargetFeatureISAVersion <9,0,6, +def FeatureISAVersion9_0_6 : FeatureSet< [FeatureGFX9, HalfRate64Ops, FeatureFmaMixInsts, @@ -571,7 +574,7 @@ def FeatureISAVersion9_0_6 : SubtargetFeatureISAVersion <9,0,6, FeatureSRAMECC, FeatureCodeObjectV3]>; -def FeatureISAVersion9_0_9 : SubtargetFeatureISAVersion <9,0,9, +def FeatureISAVersion9_0_9 : FeatureSet< [FeatureGFX9, FeatureMadMixInsts, FeatureLDSBankCount32, diff --git a/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/lib/Target/AMDGPU/AMDGPUSubtarget.cpp index dda0fe75f80..c08d1aa1e8a 100644 --- a/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ b/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -156,7 +156,6 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, AMDGPUSubtarget(TT), TargetTriple(TT), Gen(SOUTHERN_ISLANDS), - IsaVersion(ISAVersion0_0_0), InstrItins(getInstrItineraryForCPU(GPU)), LDSBankCount(0), MaxPrivateElementSize(0), diff --git a/lib/Target/AMDGPU/AMDGPUSubtarget.h b/lib/Target/AMDGPU/AMDGPUSubtarget.h index 06d750d7b89..5bc14f6419f 100644 --- a/lib/Target/AMDGPU/AMDGPUSubtarget.h +++ b/lib/Target/AMDGPU/AMDGPUSubtarget.h @@ -245,26 +245,6 @@ public: class GCNSubtarget : public AMDGPUGenSubtargetInfo, public AMDGPUSubtarget { public: - enum { - ISAVersion0_0_0, - ISAVersion6_0_0, - ISAVersion6_0_1, - ISAVersion7_0_0, - ISAVersion7_0_1, - ISAVersion7_0_2, - ISAVersion7_0_3, - ISAVersion7_0_4, - ISAVersion8_0_1, - ISAVersion8_0_2, - ISAVersion8_0_3, - ISAVersion8_1_0, - ISAVersion9_0_0, - ISAVersion9_0_2, - ISAVersion9_0_4, - ISAVersion9_0_6, - ISAVersion9_0_9, - }; - enum TrapHandlerAbi { TrapHandlerAbiNone = 0, TrapHandlerAbiHsa = 1 @@ -296,7 +276,6 @@ protected: // Basic subtarget description. Triple TargetTriple; unsigned Gen; - unsigned IsaVersion; InstrItineraryData InstrItins; int LDSBankCount; unsigned MaxPrivateElementSize; diff --git a/lib/Target/AMDGPU/GCNProcessors.td b/lib/Target/AMDGPU/GCNProcessors.td index dbd955b568f..a8da2ad4e88 100644 --- a/lib/Target/AMDGPU/GCNProcessors.td +++ b/lib/Target/AMDGPU/GCNProcessors.td @@ -12,151 +12,159 @@ def : ProcessorModel<"generic", NoSchedModel, [FeatureWavefrontSize64] >; -//===----------------------------------------------------------------------===// +//===------------------------------------------------------------===// // GCN GFX6 (Southern Islands (SI)). -//===----------------------------------------------------------------------===// +//===------------------------------------------------------------===// def : ProcessorModel<"gfx600", SIFullSpeedModel, - [FeatureISAVersion6_0_0] + FeatureISAVersion6_0_0.Features >; def : ProcessorModel<"tahiti", SIFullSpeedModel, - [FeatureISAVersion6_0_0] + FeatureISAVersion6_0_0.Features >; def : ProcessorModel<"gfx601", SIQuarterSpeedModel, - [FeatureISAVersion6_0_1] + FeatureISAVersion6_0_1.Features >; def : ProcessorModel<"hainan", SIQuarterSpeedModel, - [FeatureISAVersion6_0_1] + FeatureISAVersion6_0_1.Features >; def : ProcessorModel<"oland", SIQuarterSpeedModel, - [FeatureISAVersion6_0_1] + FeatureISAVersion6_0_1.Features >; def : ProcessorModel<"pitcairn", SIQuarterSpeedModel, - [FeatureISAVersion6_0_1] + FeatureISAVersion6_0_1.Features >; def : ProcessorModel<"verde", SIQuarterSpeedModel, - [FeatureISAVersion6_0_1] + FeatureISAVersion6_0_1.Features >; -//===----------------------------------------------------------------------===// +//===------------------------------------------------------------===// // GCN GFX7 (Sea Islands (CI)). -//===----------------------------------------------------------------------===// +//===------------------------------------------------------------===// def : ProcessorModel<"gfx700", SIQuarterSpeedModel, - [FeatureISAVersion7_0_0] + FeatureISAVersion7_0_0.Features >; def : ProcessorModel<"kaveri", SIQuarterSpeedModel, - [FeatureISAVersion7_0_0] + FeatureISAVersion7_0_0.Features >; def : ProcessorModel<"gfx701", SIFullSpeedModel, - [FeatureISAVersion7_0_1] + FeatureISAVersion7_0_1.Features >; def : ProcessorModel<"hawaii", SIFullSpeedModel, - [FeatureISAVersion7_0_1] + FeatureISAVersion7_0_1.Features >; def : ProcessorModel<"gfx702", SIQuarterSpeedModel, - [FeatureISAVersion7_0_2] + FeatureISAVersion7_0_2.Features >; def : ProcessorModel<"gfx703", SIQuarterSpeedModel, - [FeatureISAVersion7_0_3] + FeatureISAVersion7_0_3.Features >; def : ProcessorModel<"kabini", SIQuarterSpeedModel, - [FeatureISAVersion7_0_3] + FeatureISAVersion7_0_3.Features >; def : ProcessorModel<"mullins", SIQuarterSpeedModel, - [FeatureISAVersion7_0_3] + FeatureISAVersion7_0_3.Features >; def : ProcessorModel<"gfx704", SIQuarterSpeedModel, - [FeatureISAVersion7_0_4] + FeatureISAVersion7_0_4.Features >; def : ProcessorModel<"bonaire", SIQuarterSpeedModel, - [FeatureISAVersion7_0_4] + FeatureISAVersion7_0_4.Features >; -//===----------------------------------------------------------------------===// +//===------------------------------------------------------------===// // GCN GFX8 (Volcanic Islands (VI)). -//===----------------------------------------------------------------------===// +//===------------------------------------------------------------===// def : ProcessorModel<"gfx801", SIQuarterSpeedModel, - [FeatureISAVersion8_0_1] + FeatureISAVersion8_0_1.Features >; def : ProcessorModel<"carrizo", SIQuarterSpeedModel, - [FeatureISAVersion8_0_1] + FeatureISAVersion8_0_1.Features >; def : ProcessorModel<"gfx802", SIQuarterSpeedModel, - [FeatureISAVersion8_0_2] + FeatureISAVersion8_0_2.Features >; def : ProcessorModel<"iceland", SIQuarterSpeedModel, - [FeatureISAVersion8_0_2] + FeatureISAVersion8_0_2.Features >; def : ProcessorModel<"tonga", SIQuarterSpeedModel, - [FeatureISAVersion8_0_2] + FeatureISAVersion8_0_2.Features >; def : ProcessorModel<"gfx803", SIQuarterSpeedModel, - [FeatureISAVersion8_0_3] + FeatureISAVersion8_0_3.Features >; def : ProcessorModel<"fiji", SIQuarterSpeedModel, - [FeatureISAVersion8_0_3] + FeatureISAVersion8_0_3.Features >; def : ProcessorModel<"polaris10", SIQuarterSpeedModel, - [FeatureISAVersion8_0_3] + FeatureISAVersion8_0_3.Features >; def : ProcessorModel<"polaris11", SIQuarterSpeedModel, - [FeatureISAVersion8_0_3] + FeatureISAVersion8_0_3.Features >; def : ProcessorModel<"gfx810", SIQuarterSpeedModel, - [FeatureISAVersion8_1_0] + FeatureISAVersion8_1_0.Features >; def : ProcessorModel<"stoney", SIQuarterSpeedModel, - [FeatureISAVersion8_1_0] + FeatureISAVersion8_1_0.Features >; -//===----------------------------------------------------------------------===// +//===-------------------------------------------------------------===// // GCN GFX9. -//===----------------------------------------------------------------------===// +//===-------------------------------------------------------------===// + +def : ProcessorModel<"gfx900", SIQuarterSpeedModel, + FeatureISAVersion9_0_0.Features +>; + +//===------------------------------------------------------------===// +// GCN GFX9. +//===------------------------------------------------------------===// def : ProcessorModel<"gfx900", SIQuarterSpeedModel, - [FeatureISAVersion9_0_0] + FeatureISAVersion9_0_0.Features >; def : ProcessorModel<"gfx902", SIQuarterSpeedModel, - [FeatureISAVersion9_0_2] + FeatureISAVersion9_0_2.Features >; def : ProcessorModel<"gfx904", SIQuarterSpeedModel, - [FeatureISAVersion9_0_4] + FeatureISAVersion9_0_4.Features >; def : ProcessorModel<"gfx906", SIQuarterSpeedModel, - [FeatureISAVersion9_0_6] + FeatureISAVersion9_0_6.Features >; def : ProcessorModel<"gfx909", SIQuarterSpeedModel, - [FeatureISAVersion9_0_9] + FeatureISAVersion9_0_9.Features >;