From: Elena Demikhovsky <elena.demikhovsky@intel.com>
Date: Thu, 22 Oct 2015 07:10:29 +0000 (+0000)
Subject: AVX-512: Fixed a bug in select_cc for i1 type
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=26658aadc6b19f86e83f916b5b5921d803ea3c90;p=llvm

AVX-512: Fixed a bug in select_cc for i1 type
Fixed faiure:
LLVM ERROR: Cannot select: t33: i1 = select_cc t25, Constant:i32<0>, t45, t42, seteq:ch

added a test

Differential Revision: http://reviews.llvm.org/D13943



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250996 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 6213a4d2db3..0de6acd5879 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1328,6 +1328,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
 
     setOperationAction(ISD::BR_CC,              MVT::i1,    Expand);
     setOperationAction(ISD::SETCC,              MVT::i1,    Custom);
+    setOperationAction(ISD::SELECT_CC,          MVT::i1,    Expand);
     setOperationAction(ISD::XOR,                MVT::i1,    Legal);
     setOperationAction(ISD::OR,                 MVT::i1,    Legal);
     setOperationAction(ISD::AND,                MVT::i1,    Legal);
diff --git a/test/CodeGen/X86/avx512-cmp.ll b/test/CodeGen/X86/avx512-cmp.ll
index 6e0d18558c5..f6ea29123f1 100644
--- a/test/CodeGen/X86/avx512-cmp.ll
+++ b/test/CodeGen/X86/avx512-cmp.ll
@@ -1,4 +1,5 @@
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix AVX512-32
 
 ; CHECK-LABEL: test1
 ; CHECK: vucomisd {{.*}}encoding: [0x62
@@ -99,3 +100,27 @@ A:
 B:
  ret i32 7
 }
+
+; AVX512-32-LABEL: test10
+; AVX512-32: movl    4(%esp), %ecx
+; AVX512-32: cmpl    $9, (%ecx)
+; AVX512-32: seta    %al
+; AVX512-32: cmpl    $0, 4(%ecx)
+; AVX512-32: setg    %cl
+; AVX512-32: je
+; AVX512-32: movb    %cl, %al
+; AVX512-32: testb   $1, %al
+
+define void @test10(i64* %i.addr)  {
+
+  %x = load i64, i64* %i.addr, align 8
+  %cmp = icmp slt i64 %x, 10
+  br i1 %cmp, label %true, label %false
+
+true:
+  ret void
+
+false:
+  ret void
+}
+