From: Sanjay Patel <spatel@rotateright.com>
Date: Mon, 27 Jun 2016 22:27:11 +0000 (+0000)
Subject: [InstCombine] shrink type of sdiv if dividend is sexted and constant divisor is small... 
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=230a1ede0035ae367e31a8b514944732f3ed4418;p=llvm

[InstCombine] shrink type of sdiv if dividend is sexted and constant divisor is small enough (PR28153)

This should fix PR28153:
https://llvm.org/bugs/show_bug.cgi?id=28153

Differential Revision: http://reviews.llvm.org/D21769



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273951 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 4e5bf7859db..788097f33f1 100644
--- a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1150,6 +1150,23 @@ Instruction *InstCombiner::visitSDiv(BinaryOperator &I) {
       Value *ShAmt = ConstantInt::get(Op1->getType(), Op1C->exactLogBase2());
       return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName());
     }
+
+    // If the dividend is sign-extended and the constant divisor is small enough
+    // to fit in the source type, shrink the division to the narrower type:
+    // (sext X) sdiv C --> sext (X sdiv C)
+    Value *Op0Src;
+    if (match(Op0, m_OneUse(m_SExt(m_Value(Op0Src)))) &&
+        Op0Src->getType()->getScalarSizeInBits() >= Op1C->getMinSignedBits()) {
+
+      // In the general case, we need to make sure that the dividend is not the
+      // minimum signed value because dividing that by -1 is UB. But here, we
+      // know that the -1 divisor case is already handled above.
+
+      Constant *NarrowDivisor =
+          ConstantExpr::getTrunc(cast<Constant>(Op1), Op0Src->getType());
+      Value *NarrowOp = Builder->CreateSDiv(Op0Src, NarrowDivisor);
+      return new SExtInst(NarrowOp, Op0->getType());
+    }
   }
 
   if (Constant *RHS = dyn_cast<Constant>(Op1)) {
diff --git a/test/Transforms/InstCombine/div.ll b/test/Transforms/InstCombine/div.ll
index 4ad7005da20..a19cdefa31f 100644
--- a/test/Transforms/InstCombine/div.ll
+++ b/test/Transforms/InstCombine/div.ll
@@ -409,13 +409,12 @@ lor.end:                                          ; preds = %lor.rhs, %entry
   ret i32 %div
 }
 
-; FIXME:
 ; We can perform the division in the smaller type.
 
 define i32 @shrink(i8 %x) {
 ; CHECK-LABEL: @shrink(
-; CHECK-NEXT:    [[CONV:%.*]] = sext i8 %x to i32
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = sdiv i8 %x, 127
+; CHECK-NEXT:    [[DIV:%.*]] = sext i8 [[TMP1]] to i32
 ; CHECK-NEXT:    ret i32 [[DIV]]
 ;
   %conv = sext i8 %x to i32
@@ -427,8 +426,8 @@ define i32 @shrink(i8 %x) {
 
 define i32 @zap(i8 %x) {
 ; CHECK-LABEL: @zap(
-; CHECK-NEXT:    [[CONV:%.*]] = sext i8 %x to i32
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], -128
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i8 %x, -128
+; CHECK-NEXT:    [[DIV:%.*]] = zext i1 [[TMP1]] to i32
 ; CHECK-NEXT:    ret i32 [[DIV]]
 ;
   %conv = sext i8 %x to i32
@@ -440,8 +439,8 @@ define i32 @zap(i8 %x) {
 
 define <3 x i32> @shrink_vec(<3 x i8> %x) {
 ; CHECK-LABEL: @shrink_vec(
-; CHECK-NEXT:    [[CONV:%.*]] = sext <3 x i8> %x to <3 x i32>
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv <3 x i32> [[CONV]], <i32 127, i32 127, i32 127>
+; CHECK-NEXT:    [[TMP1:%.*]] = sdiv <3 x i8> %x, <i8 127, i8 127, i8 127>
+; CHECK-NEXT:    [[DIV:%.*]] = sext <3 x i8> [[TMP1]] to <3 x i32>
 ; CHECK-NEXT:    ret <3 x i32> [[DIV]]
 ;
   %conv = sext <3 x i8> %x to <3 x i32>
@@ -451,8 +450,8 @@ define <3 x i32> @shrink_vec(<3 x i8> %x) {
 
 define <2 x i32> @zap_vec(<2 x i8> %x) {
 ; CHECK-LABEL: @zap_vec(
-; CHECK-NEXT:    [[CONV:%.*]] = sext <2 x i8> %x to <2 x i32>
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv <2 x i32> [[CONV]], <i32 -128, i32 -128>
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <2 x i8> %x, <i8 -128, i8 -128>
+; CHECK-NEXT:    [[DIV:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32>
 ; CHECK-NEXT:    ret <2 x i32> [[DIV]]
 ;
   %conv = sext <2 x i8> %x to <2 x i32>
@@ -484,3 +483,16 @@ define i32 @shrink_no2(i8 %x) {
   ret i32 %div
 }
 
+; 17 bits are needed to represent 65535 as a signed value, so this shouldn't fold.
+
+define i32 @shrink_no3(i16 %x) {
+; CHECK-LABEL: @shrink_no3(
+; CHECK-NEXT:    [[CONV:%.*]] = sext i16 %x to i32
+; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], 65535
+; CHECK-NEXT:    ret i32 [[DIV]]
+;
+  %conv = sext i16 %x to i32
+  %div = sdiv i32 %conv, 65535
+  ret i32 %div
+}
+