From: Chad Rosier <mcrosier@apple.com>
Date: Tue, 4 Sep 2012 16:39:38 +0000 (+0000)
Subject: [ms-inline asm] The MCInstrDesc only tracks register definitions.  For now,
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=21a37047e56d717c7979fa653c9f30aae468608d;p=clang

[ms-inline asm] The MCInstrDesc only tracks register definitions.  For now,
assume that if the 1st operands is an expression and the instruction mayStore,
then it is a memory definition.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@163144 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Sema/SemaStmtAsm.cpp b/lib/Sema/SemaStmtAsm.cpp
index 2af2afe398..b6a4e62f95 100644
--- a/lib/Sema/SemaStmtAsm.cpp
+++ b/lib/Sema/SemaStmtAsm.cpp
@@ -624,7 +624,8 @@ StmtResult Sema::ActOnMSAsmStmt(SourceLocation AsmLoc,
             ExprResult Result = ActOnIdExpression(getCurScope(), SS, Loc, Id,
                                                   false, false);
             if (!Result.isInvalid()) {
-              if (isDef) {
+              bool isMemDef = (i == 1) && Desc.mayStore();
+              if (isDef || isMemDef) {
                 Outputs.push_back(II);
                 OutputExprs.push_back(Result.take());
                 OutputConstraints.push_back("=r");
diff --git a/test/CodeGen/ms-inline-asm.c b/test/CodeGen/ms-inline-asm.c
index 8b4af0b9f8..9c902cd198 100644
--- a/test/CodeGen/ms-inline-asm.c
+++ b/test/CodeGen/ms-inline-asm.c
@@ -88,8 +88,7 @@ unsigned t10(void) {
 // CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4
 // CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4
 // CHECK: store i32 1, i32* [[I]], align 4
-// Note: The AsmParser isn't properly matching the second instruction (i.e., j is being marked as an input, when in fact it is an output).
-// CHECK: call void asm sideeffect "mov eax, i\0Amov j, eax", "r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i32 %{{.*}}) nounwind ia_nsdialect
+// CHECK: call i32 asm sideeffect "mov eax, i\0Amov j, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}) nounwind ia_nsdialect
 // CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32* [[J]], align 4
 // CHECK: ret i32 [[RET]]
 }