From: Eli Friedman <efriedma@quicinc.com>
Date: Thu, 20 Jun 2019 22:00:07 +0000 (+0000)
Subject: [ARM GlobalISel] Tests for s64 G_ADD and G_SUB.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=21536fd46aa054da92293853596585aba3af5705;p=llvm

[ARM GlobalISel] Tests for s64 G_ADD and G_SUB.

Forgot to commit these in r363989 (https://reviews.llvm.org/D63585)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363991 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/ARM/GlobalISel/arm-legalize-binops-neon.mir b/test/CodeGen/ARM/GlobalISel/arm-legalize-binops-neon.mir
new file mode 100644
index 00000000000..26050405309
--- /dev/null
+++ b/test/CodeGen/ARM/GlobalISel/arm-legalize-binops-neon.mir
@@ -0,0 +1,55 @@
+# RUN: llc -mtriple arm-- -mattr=+neon -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -mtriple thumb-- -mattr=+v6t2,+neon -run-pass=legalizer %s -o - | FileCheck %s
+--- |
+  define void @test_add_s64() { ret void }
+
+  define void @test_sub_s64() { ret void }
+...
+---
+name:            test_add_s64
+# CHECK-LABEL: name: test_add_s64
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body:             |
+  bb.0:
+    liveins: $d0, $d1
+
+    %0(s64) = COPY $d0
+    %1(s64) = COPY $d1
+    %2(s64) = G_ADD %0, %1
+    ; G_ADD with s64 is legal, so we should find it unchanged in the output
+    ; CHECK: {{%[0-9]+}}:_(s64) = G_ADD {{%[0-9]+, %[0-9]+}}
+    $d0 = COPY %2(s64)
+    BX_RET 14, $noreg, implicit $d0
+...
+---
+name:            test_sub_s64
+# CHECK-LABEL: name: test_sub_s64
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body:             |
+  bb.0:
+    liveins: $d0, $d1
+
+    %0(s64) = COPY $d0
+    %1(s64) = COPY $d1
+    %2(s64) = G_SUB %0, %1
+    ; G_SUB with s64 is legal, so we should find it unchanged in the output
+    ; CHECK: {{%[0-9]+}}:_(s64) = G_SUB {{%[0-9]+, %[0-9]+}}
+    $d0 = COPY %2(s64)
+    BX_RET 14, $noreg, implicit $d0
+...
diff --git a/test/CodeGen/ARM/GlobalISel/select-neon.mir b/test/CodeGen/ARM/GlobalISel/select-neon.mir
new file mode 100644
index 00000000000..d5ba82fe281
--- /dev/null
+++ b/test/CodeGen/ARM/GlobalISel/select-neon.mir
@@ -0,0 +1,66 @@
+# RUN: llc -O0 -mtriple arm-- -mattr=+neon -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+  define void @test_add_s64() { ret void }
+  define void @test_sub_s64() { ret void }
+...
+---
+name:            test_add_s64
+# CHECK-LABEL: name: test_add_s64
+legalized:       true
+regBankSelected: true
+selected:        false
+# CHECK: selected: true
+registers:
+  - { id: 0, class: fprb }
+  - { id: 1, class: fprb }
+  - { id: 2, class: fprb }
+body:             |
+  bb.0:
+    liveins: $d0, $d1
+
+    %0(s64) = COPY $d0
+    ; CHECK: [[VREGX:%[0-9]+]]:dpr = COPY $d0
+
+    %1(s64) = COPY $d1
+    ; CHECK: [[VREGY:%[0-9]+]]:dpr = COPY $d1
+
+    %2(s64) = G_ADD %0, %1
+    ; CHECK: [[VREGSUM:%[0-9]+]]:dpr = VADDv1i64 [[VREGX]], [[VREGY]], 14, $noreg
+
+    $d0 = COPY %2(s64)
+    ; CHECK: $d0 = COPY [[VREGSUM]]
+
+    BX_RET 14, $noreg, implicit $d0
+    ; CHECK: BX_RET 14, $noreg, implicit $d0
+...
+---
+name:            test_sub_s64
+# CHECK-LABEL: name: test_sub_s64
+legalized:       true
+regBankSelected: true
+selected:        false
+# CHECK: selected: true
+registers:
+  - { id: 0, class: fprb }
+  - { id: 1, class: fprb }
+  - { id: 2, class: fprb }
+body:             |
+  bb.0:
+    liveins: $d0, $d1
+
+    %0(s64) = COPY $d0
+    ; CHECK: [[VREGX:%[0-9]+]]:dpr = COPY $d0
+
+    %1(s64) = COPY $d1
+    ; CHECK: [[VREGY:%[0-9]+]]:dpr = COPY $d1
+
+    %2(s64) = G_SUB %0, %1
+    ; CHECK: [[VREGSUM:%[0-9]+]]:dpr = VSUBv1i64 [[VREGX]], [[VREGY]], 14, $noreg
+
+    $d0 = COPY %2(s64)
+    ; CHECK: $d0 = COPY [[VREGSUM]]
+
+    BX_RET 14, $noreg, implicit $d0
+    ; CHECK: BX_RET 14, $noreg, implicit $d0
+