From: Alexey Bataev Date: Thu, 13 Jul 2017 14:29:19 +0000 (+0000) Subject: [OPENMP] Fix reduction tests, NFC. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1ecb6bd663460d40cfeb2896de2bbcb95ba95049;p=clang [OPENMP] Fix reduction tests, NFC. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@307911 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/OpenMP/for_reduction_codegen.cpp b/test/OpenMP/for_reduction_codegen.cpp index 01a179c374..22aac4c390 100644 --- a/test/OpenMP/for_reduction_codegen.cpp +++ b/test/OpenMP/for_reduction_codegen.cpp @@ -497,12 +497,13 @@ int main() { // CHECK: [[RED_LIST:%.+]] = alloca [4 x i8*], // CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], +// CHECK: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** +// CHECK: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** [[ARR_ADDR:%.+]], +// CHECK: [[ARR:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[ARR_ADDR]], -// CHECK: [[IDX1:%.+]] = mul nsw i64 1, %{{.+}} -// CHECK: [[LB1:%.+]] = getelementptr inbounds i32, i32* %{{.+}}, i64 [[IDX1]] +// CHECK: [[LB1:%.+]] = getelementptr inbounds i32, i32* [[ARR]], i64 // CHECK: [[LB1_0:%.+]] = getelementptr inbounds i32, i32* [[LB1]], i64 0 -// CHECK: [[IDX1:%.+]] = mul nsw i64 1, %{{.+}} -// CHECK: [[UB1:%.+]] = getelementptr inbounds i32, i32* %{{.+}}, i64 [[IDX1]] +// CHECK: [[UB1:%.+]] = getelementptr inbounds i32, i32* [[ARR]], i64 // CHECK: [[UB1_UP:%.+]] = getelementptr inbounds i32, i32* [[UB1]], i64 % // CHECK: [[UB_CAST:%.+]] = ptrtoint i32* [[UB1_UP]] to i64 // CHECK: [[LB_CAST:%.+]] = ptrtoint i32* [[LB1_0]] to i64 diff --git a/test/OpenMP/for_reduction_codegen_UDR.cpp b/test/OpenMP/for_reduction_codegen_UDR.cpp index 4f14b9df13..69dd31ddcb 100644 --- a/test/OpenMP/for_reduction_codegen_UDR.cpp +++ b/test/OpenMP/for_reduction_codegen_UDR.cpp @@ -306,12 +306,13 @@ int main() { // CHECK: [[RED_LIST:%.+]] = alloca [4 x i8*], // CHECK: store i{{[0-9]+}}* [[GTID_ADDR]], i{{[0-9]+}}** [[GTID_ADDR_ADDR:%.+]], +// CHECK: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** +// CHECK: store i{{[0-9]+}}* %{{.+}}, i{{[0-9]+}}** [[ARR_ADDR:%.+]], +// CHECK: [[ARR:%.+]] = load i{{[0-9]+}}*, i{{[0-9]+}}** [[ARR_ADDR]], -// CHECK: [[IDX1:%.+]] = mul nsw i64 1, %{{.+}} -// CHECK: [[LB1:%.+]] = getelementptr inbounds i32, i32* %{{.+}}, i64 [[IDX1]] +// CHECK: [[LB1:%.+]] = getelementptr inbounds i32, i32* [[ARR]], i64 // CHECK: [[LB1_0:%.+]] = getelementptr inbounds i32, i32* [[LB1]], i64 0 -// CHECK: [[IDX1:%.+]] = mul nsw i64 1, %{{.+}} -// CHECK: [[UB1:%.+]] = getelementptr inbounds i32, i32* %{{.+}}, i64 [[IDX1]] +// CHECK: [[UB1:%.+]] = getelementptr inbounds i32, i32* [[ARR]], i64 // CHECK: [[UB1_UP:%.+]] = getelementptr inbounds i32, i32* [[UB1]], i64 % // CHECK: [[UB_CAST:%.+]] = ptrtoint i32* [[UB1_UP]] to i64 // CHECK: [[LB_CAST:%.+]] = ptrtoint i32* [[LB1_0]] to i64