From: Peter Johnson <peter@tortall.net>
Date: Fri, 10 Feb 2006 02:43:15 +0000 (-0000)
Subject: * x86id.re (str_insn): Fix #68.  Based on the patch submitted but with some
X-Git-Tag: v0.5.0rc1~13
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1d4aab4fc51eedba09d83b4376d8b10be561af98;p=yasm

* x86id.re (str_insn): Fix #68.  Based on the patch submitted but with some
other cleanups as well.
* str.asm: New test for above.

Reported by: bird-yasm@anduin.net

svn path=/trunk/yasm/; revision=1367
---

diff --git a/modules/arch/x86/tests/Makefile.inc b/modules/arch/x86/tests/Makefile.inc
index 3110b842..616da6a7 100644
--- a/modules/arch/x86/tests/Makefile.inc
+++ b/modules/arch/x86/tests/Makefile.inc
@@ -157,6 +157,9 @@ EXTRA_DIST += modules/arch/x86/tests/sse3.hex
 EXTRA_DIST += modules/arch/x86/tests/stos.asm
 EXTRA_DIST += modules/arch/x86/tests/stos.errwarn
 EXTRA_DIST += modules/arch/x86/tests/stos.hex
+EXTRA_DIST += modules/arch/x86/tests/str.asm
+EXTRA_DIST += modules/arch/x86/tests/str.errwarn
+EXTRA_DIST += modules/arch/x86/tests/str.hex
 EXTRA_DIST += modules/arch/x86/tests/stringseg.asm
 EXTRA_DIST += modules/arch/x86/tests/stringseg.errwarn
 EXTRA_DIST += modules/arch/x86/tests/stringseg.hex
diff --git a/modules/arch/x86/tests/str.asm b/modules/arch/x86/tests/str.asm
new file mode 100644
index 00000000..3310b9ac
--- /dev/null
+++ b/modules/arch/x86/tests/str.asm
@@ -0,0 +1,4 @@
+[bits 32]
+str [esp]
+[bits 16]
+str [bp]
diff --git a/modules/arch/x86/tests/str.errwarn b/modules/arch/x86/tests/str.errwarn
new file mode 100644
index 00000000..e69de29b
diff --git a/modules/arch/x86/tests/str.hex b/modules/arch/x86/tests/str.hex
new file mode 100644
index 00000000..82c563c9
--- /dev/null
+++ b/modules/arch/x86/tests/str.hex
@@ -0,0 +1,8 @@
+0f 
+00 
+0c 
+24 
+0f 
+00 
+4e 
+00 
diff --git a/modules/arch/x86/x86id.re b/modules/arch/x86/x86id.re
index 1d7deb35..13497c82 100644
--- a/modules/arch/x86/x86id.re
+++ b/modules/arch/x86/x86id.re
@@ -1374,14 +1374,14 @@ static const x86_insn_info arpl_insn[] = {
       {OPT_RM|OPS_16|OPS_Relaxed|OPA_EA, OPT_Reg|OPS_16|OPA_Spare, 0} }
 };
 static const x86_insn_info str_insn[] = {
-    { CPU_Hammer, MOD_GasSufW, 16, 0, 0, 2, {0x0F, 0x00, 0}, 1, 1,
+    { CPU_286|CPU_Prot, MOD_GasSufW, 16, 0, 0, 2, {0x0F, 0x00, 0}, 1, 1,
       {OPT_Reg|OPS_16|OPA_EA, 0, 0} },
-    { CPU_Hammer, MOD_GasSufL, 32, 0, 0, 2, {0x0F, 0x00, 0}, 1, 1,
+    { CPU_386|CPU_Prot, MOD_GasSufL, 32, 0, 0, 2, {0x0F, 0x00, 0}, 1, 1,
       {OPT_Reg|OPS_32|OPA_EA, 0, 0} },
-    { CPU_Hammer|CPU_64, MOD_GasSufQ, 64, 0, 0, 2, {0x0F, 0x00, 0}, 1, 1,
-      {OPT_Reg|OPS_64|OPA_EA, 0, 0} },
-    { CPU_286, MOD_Op1Add|MOD_SpAdd|MOD_GasSufW, 0, 0, 0, 2, {0x0F, 0x00, 0},
-      0, 1, {OPT_RM|OPS_16|OPS_Relaxed|OPA_EA, 0, 0} }
+    { CPU_Hammer|CPU_64|CPU_Prot, MOD_GasSufQ, 64, 0, 0, 2, {0x0F, 0x00, 0}, 1,
+      1, {OPT_Reg|OPS_64|OPA_EA, 0, 0} },
+    { CPU_286|CPU_Prot, MOD_GasSufW|MOD_GasSufL, 0, 0, 0, 2, {0x0F, 0x00, 0},
+      1, 1, {OPT_RM|OPS_16|OPS_Relaxed|OPA_EA, 0, 0} }
 };
 static const x86_insn_info prot286_insn[] = {
     { CPU_286, MOD_Op1Add|MOD_SpAdd|MOD_GasSufW, 0, 0, 0, 2, {0x0F, 0x00, 0},