From: Roman Lebedev <lebedev.ri@gmail.com>
Date: Tue, 4 Jun 2019 17:05:34 +0000 (+0000)
Subject: [NFC][Codegen][PowerPC] Autogenerate shift-cmp.ll test
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1c4724169b22332fa15431c3d92fda219d522d33;p=llvm

[NFC][Codegen][PowerPC] Autogenerate shift-cmp.ll test

Being affected by upcoming patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362529 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/PowerPC/shift-cmp.ll b/test/CodeGen/PowerPC/shift-cmp.ll
index 299b643be73..ffbcd6b85c0 100644
--- a/test/CodeGen/PowerPC/shift-cmp.ll
+++ b/test/CodeGen/PowerPC/shift-cmp.ll
@@ -1,54 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s | FileCheck %s
 target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-unknown-linux-gnu"
 
 define i1 @and_cmp_variable_power_of_two(i32 %x, i32 %y) {
+; CHECK-LABEL: and_cmp_variable_power_of_two:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    subfic 4, 4, 32
+; CHECK-NEXT:    rlwnm 3, 3, 4, 31, 31
+; CHECK-NEXT:    blr
   %shl = shl i32 1, %y
   %and = and i32 %x, %shl
   %cmp = icmp eq i32 %and, %shl
   ret i1 %cmp
-
-; CHECK-LABEL: @and_cmp_variable_power_of_two
-; CHECK: subfic 4, 4, 32
-; CHECK: rlwnm 3, 3, 4, 31, 31
-; CHECK: blr
 }
 
 define i1 @and_cmp_variable_power_of_two_64(i64 %x, i64 %y) {
+; CHECK-LABEL: and_cmp_variable_power_of_two_64:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    subfic 4, 4, 64
+; CHECK-NEXT:    rldcl 3, 3, 4, 63
+; CHECK-NEXT:    blr
   %shl = shl i64 1, %y
   %and = and i64 %x, %shl
   %cmp = icmp eq i64 %and, %shl
   ret i1 %cmp
-
-; CHECK-LABEL: @and_cmp_variable_power_of_two_64
-; CHECK: subfic 4, 4, 64
-; CHECK: rldcl 3, 3, 4, 63
-; CHECK: blr
 }
 
 define i1 @and_ncmp_variable_power_of_two(i32 %x, i32 %y) {
+; CHECK-LABEL: and_ncmp_variable_power_of_two:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    subfic 4, 4, 32
+; CHECK-NEXT:    nor 3, 3, 3
+; CHECK-NEXT:    rlwnm 3, 3, 4, 31, 31
+; CHECK-NEXT:    blr
   %shl = shl i32 1, %y
   %and = and i32 %x, %shl
   %cmp = icmp ne i32 %and, %shl
   ret i1 %cmp
-
-; CHECK-LABEL: @and_ncmp_variable_power_of_two
-; CHECK-DAG: subfic 4, 4, 32
-; CHECK-DAG: nor [[REG:[0-9]+]], 3, 3
-; CHECK: rlwnm 3, [[REG]], 4, 31, 31
-; CHECK: blr
 }
 
 define i1 @and_ncmp_variable_power_of_two_64(i64 %x, i64 %y) {
+; CHECK-LABEL: and_ncmp_variable_power_of_two_64:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    not 3, 3
+; CHECK-NEXT:    subfic 4, 4, 64
+; CHECK-NEXT:    rldcl 3, 3, 4, 63
+; CHECK-NEXT:    blr
   %shl = shl i64 1, %y
   %and = and i64 %x, %shl
   %cmp = icmp ne i64 %and, %shl
   ret i1 %cmp
-
-; CHECK-LABEL: @and_ncmp_variable_power_of_two_64
-; CHECK-DAG: subfic 4, 4, 64
-; CHECK-DAG: not [[REG:[0-9]+]], 3
-; CHECK: rldcl 3, [[REG]], 4, 63
-; CHECK: blr
 }
-