From: Michael Zuckerman Date: Mon, 9 May 2016 12:38:49 +0000 (+0000) Subject: [clang][AVX512] completing missing intrinsics [vmin/vmax]. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1c3adae8bcfeeec7af4c7d2fecdcf52fdc0c1193;p=clang [clang][AVX512] completing missing intrinsics [vmin/vmax]. Differential Revision: http://reviews.llvm.org/D20062 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@268910 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Headers/avx512fintrin.h b/lib/Headers/avx512fintrin.h index b6188831e7..5a09b0141d 100644 --- a/lib/Headers/avx512fintrin.h +++ b/lib/Headers/avx512fintrin.h @@ -735,6 +735,27 @@ _mm512_max_pd(__m512d __A, __m512d __B) _MM_FROUND_CUR_DIRECTION); } +static __inline__ __m512d __DEFAULT_FN_ATTRS +_mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) +{ + return (__m512d) __builtin_ia32_maxpd512_mask ((__v8df) __A, + (__v8df) __B, + (__v8df) __W, + (__mmask8) __U, + _MM_FROUND_CUR_DIRECTION); +} + +static __inline__ __m512d __DEFAULT_FN_ATTRS +_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) +{ + return (__m512d) __builtin_ia32_maxpd512_mask ((__v8df) __A, + (__v8df) __B, + (__v8df) + _mm512_setzero_pd (), + (__mmask8) __U, + _MM_FROUND_CUR_DIRECTION); +} + static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_max_ps(__m512 __A, __m512 __B) { @@ -746,6 +767,27 @@ _mm512_max_ps(__m512 __A, __m512 __B) _MM_FROUND_CUR_DIRECTION); } +static __inline__ __m512 __DEFAULT_FN_ATTRS +_mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) +{ + return (__m512) __builtin_ia32_maxps512_mask ((__v16sf) __A, + (__v16sf) __B, + (__v16sf) __W, + (__mmask16) __U, + _MM_FROUND_CUR_DIRECTION); +} + +static __inline__ __m512 __DEFAULT_FN_ATTRS +_mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B) +{ + return (__m512) __builtin_ia32_maxps512_mask ((__v16sf) __A, + (__v16sf) __B, + (__v16sf) + _mm512_setzero_ps (), + (__mmask16) __U, + _MM_FROUND_CUR_DIRECTION); +} + static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A, @@ -858,6 +900,27 @@ _mm512_min_pd(__m512d __A, __m512d __B) _MM_FROUND_CUR_DIRECTION); } +static __inline__ __m512d __DEFAULT_FN_ATTRS +_mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) +{ + return (__m512d) __builtin_ia32_minpd512_mask ((__v8df) __A, + (__v8df) __B, + (__v8df) __W, + (__mmask8) __U, + _MM_FROUND_CUR_DIRECTION); +} + +static __inline__ __m512d __DEFAULT_FN_ATTRS +_mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) +{ + return (__m512d) __builtin_ia32_minpd512_mask ((__v8df) __A, + (__v8df) __B, + (__v8df) + _mm512_setzero_pd (), + (__mmask8) __U, + _MM_FROUND_CUR_DIRECTION); +} + static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_min_ps(__m512 __A, __m512 __B) { @@ -869,6 +932,27 @@ _mm512_min_ps(__m512 __A, __m512 __B) _MM_FROUND_CUR_DIRECTION); } +static __inline__ __m512 __DEFAULT_FN_ATTRS +_mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) +{ + return (__m512) __builtin_ia32_minps512_mask ((__v16sf) __A, + (__v16sf) __B, + (__v16sf) __W, + (__mmask16) __U, + _MM_FROUND_CUR_DIRECTION); +} + +static __inline__ __m512 __DEFAULT_FN_ATTRS +_mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B) +{ + return (__m512) __builtin_ia32_minps512_mask ((__v16sf) __A, + (__v16sf) __B, + (__v16sf) + _mm512_setzero_ps (), + (__mmask16) __U, + _MM_FROUND_CUR_DIRECTION); +} + static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A, diff --git a/test/CodeGen/avx512f-builtins.c b/test/CodeGen/avx512f-builtins.c index bb463715dc..7d88c2a682 100644 --- a/test/CodeGen/avx512f-builtins.c +++ b/test/CodeGen/avx512f-builtins.c @@ -5966,3 +5966,61 @@ __m512i test_mm512_mask_cvtps_epu32 (__m512i __W, __mmask16 __U, __m512 __A) return _mm512_mask_cvtps_epu32( __W, __U, __A); } + +__m512d test_mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) +{ + // CHECK-LABEL: @test_mm512_mask_max_pd + // CHECK: @llvm.x86.avx512.mask.max.pd.512 + return _mm512_mask_max_pd (__W,__U,__A,__B); +} + +__m512d test_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) +{ + // CHECK-LABEL: @test_mm512_maskz_max_pd + // CHECK: @llvm.x86.avx512.mask.max.pd.512 + return _mm512_maskz_max_pd (__U,__A,__B); +} + +__m512 test_mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) +{ + // CHECK-LABEL: @test_mm512_mask_max_ps + // CHECK: @llvm.x86.avx512.mask.max.ps.512 + return _mm512_mask_max_ps (__W,__U,__A,__B); +} + +__m512 test_mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B) +{ + // CHECK-LABEL: @test_mm512_maskz_max_ps + // CHECK: @llvm.x86.avx512.mask.max.ps.512 + return _mm512_maskz_max_ps (__U,__A,__B); +} + +__m512d test_mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) +{ + // CHECK-LABEL: @test_mm512_mask_min_pd + // CHECK: @llvm.x86.avx512.mask.min.pd.512 + return _mm512_mask_min_pd (__W,__U,__A,__B); +} + +__m512d test_mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) +{ + // CHECK-LABEL: @test_mm512_maskz_min_pd + // CHECK: @llvm.x86.avx512.mask.min.pd.512 + return _mm512_maskz_min_pd (__U,__A,__B); +} + +__m512 test_mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) +{ + // CHECK-LABEL: @test_mm512_mask_min_ps + // CHECK: @llvm.x86.avx512.mask.min.ps.512 + return _mm512_mask_min_ps (__W,__U,__A,__B); +} + +__m512 test_mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B) +{ + // CHECK-LABEL: @test_mm512_maskz_min_ps + // CHECK: @llvm.x86.avx512.mask.min.ps.512 + return _mm512_maskz_min_ps (__U,__A,__B); +} + +