From: Thomas Lively <tlively@google.com>
Date: Wed, 2 Jan 2019 20:43:08 +0000 (+0000)
Subject: [WebAssembly][NFC] Elaborate on simd-noopt test comment
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1c37268cc019b38c53d1b6a33f44499a40c3a588;p=llvm

[WebAssembly][NFC] Elaborate on simd-noopt test comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350260 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/WebAssembly/simd-noopt.ll b/test/CodeGen/WebAssembly/simd-noopt.ll
index 5471c38b508..1ec259ccca7 100644
--- a/test/CodeGen/WebAssembly/simd-noopt.ll
+++ b/test/CodeGen/WebAssembly/simd-noopt.ll
@@ -1,14 +1,16 @@
-; RUN: llc < %s -mattr=+simd128,+sign-ext -verify-machineinstrs
+; RUN: llc < %s -fast-isel -mattr=+simd128,+sign-ext -verify-machineinstrs
 
 ;; Ensures fastisel produces valid code when storing and loading split
-;; up v2i64 values. This is a regression test for a bug that crashed
-;; llc after fastisel produced machineinstrs that used registers that
-;; had never been defined.
+;; up v2i64 values. Lowering away v2i64s is a temporary measure while
+;; V8 does not have support for i64x2.* operations, and is done when
+;; -wasm-enable-unimplemented-simd is not present. This is a
+;; regression test for a bug that crashed llc after fastisel produced
+;; machineinstrs that used registers that had never been defined.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown-wasm"
+target triple = "wasm32-unknown-unknown"
 
-define i64 @foo(<2 x i64> %vec) #0 {
+define i64 @foo(<2 x i64> %vec) {
 entry:
   %vec.addr = alloca <2 x i64>, align 16
   store <2 x i64> %vec, <2 x i64>* %vec.addr, align 16
@@ -16,5 +18,3 @@ entry:
   %1 = extractelement <2 x i64> %0, i32 0
   ret i64 %1
 }
-
-attributes #0 = { noinline optnone }