From: Simon Pilgrim Date: Wed, 13 Mar 2019 18:18:24 +0000 (+0000) Subject: Regenerate test X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1c13a5b043852cb6d4084ea01075c896f19d10af;p=llvm Regenerate test git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356071 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll b/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll index f3847124614..7650a0d0108 100644 --- a/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll +++ b/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll @@ -1,10 +1,15 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- | FileCheck %s define i32* @t() nounwind optsize ssp { -entry: ; CHECK-LABEL: t: -; CHECK: testl %eax, %eax -; CHECK: js +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: testl %eax, %eax +; CHECK-NEXT: js .LBB0_2 +; CHECK-NEXT: # %bb.1: # %if.then27 +; CHECK-NEXT: retl +; CHECK-NEXT: .LBB0_2: # %if.else29 +entry: %cmp = icmp slt i32 undef, 0 ; [#uses=1] %outsearch.0 = select i1 %cmp, i1 false, i1 true ; [#uses=1] br i1 %outsearch.0, label %if.then27, label %if.else29