From: Craig Topper <craig.topper@gmail.com>
Date: Sun, 29 Jan 2017 04:38:19 +0000 (+0000)
Subject: [DAGCombiner] Remove unnecessary check on the size of the type of the index of EXTRAC... 
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1b7b2ab925943c9f4276016a017bd6dd3c1fbdc8;p=llvm

[DAGCombiner] Remove unnecessary check on the size of the type of the index of EXTRACT_SUBVECTOR.

The type system already requires that the number of vector elements must fit in 32-bits so an index should as well. Even if the type of the index were larger all we care about is that the constant index can fit in 64-bits so that we can call getZExtValue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293413 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index dc6b0b11c0f..3ef801f52a4 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -13916,9 +13916,7 @@ SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode* N) {
     ConstantSDNode *ExtIdx = dyn_cast<ConstantSDNode>(N->getOperand(1));
     ConstantSDNode *InsIdx = dyn_cast<ConstantSDNode>(V->getOperand(2));
 
-    if (InsIdx && ExtIdx &&
-        InsIdx->getValueType(0).getSizeInBits() <= 64 &&
-        ExtIdx->getValueType(0).getSizeInBits() <= 64) {
+    if (InsIdx && ExtIdx) {
       // Combine:
       //    (extract_subvec (insert_subvec V1, V2, InsIdx), ExtIdx)
       // Into: