From: Chad Rosier Date: Thu, 31 Oct 2013 22:36:59 +0000 (+0000) Subject: [AArch64] Add support for NEON scalar fixed-point convert to floating-point instructions. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1a035dd6df1d953af57656491eda28ceef9ad4a3;p=llvm [AArch64] Add support for NEON scalar fixed-point convert to floating-point instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193816 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/IR/IntrinsicsAArch64.td b/include/llvm/IR/IntrinsicsAArch64.td index 2dfe02a0b0d..8083b867d19 100644 --- a/include/llvm/IR/IntrinsicsAArch64.td +++ b/include/llvm/IR/IntrinsicsAArch64.td @@ -260,4 +260,15 @@ def int_aarch64_neon_vsrid_n : Neon_2Arg_ShiftImm_Intrinsic; // Shift Left And Insert (Immediate) def int_aarch64_neon_vslid_n : Neon_2Arg_ShiftImm_Intrinsic; +// Scalar Signed Fixed-point Convert To Floating-Point (Immediate) +def int_aarch64_neon_vcvtf32_n_s32 : + Intrinsic<[llvm_v1f32_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>; +def int_aarch64_neon_vcvtf64_n_s64 : + Intrinsic<[llvm_v1f64_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>; + +// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) +def int_aarch64_neon_vcvtf32_n_u32 : + Intrinsic<[llvm_v1f32_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>; +def int_aarch64_neon_vcvtf64_n_u64 : + Intrinsic<[llvm_v1f64_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>; } diff --git a/lib/Target/AArch64/AArch64InstrNEON.td b/lib/Target/AArch64/AArch64InstrNEON.td index 5e58dafbb83..183fbb6b4d9 100644 --- a/lib/Target/AArch64/AArch64InstrNEON.td +++ b/lib/Target/AArch64/AArch64InstrNEON.td @@ -3607,6 +3607,19 @@ multiclass NeonI_ScalarShiftImm_narrow_HSD_size opcode, } } +multiclass NeonI_ScalarShiftImm_scvtf_SD_size opcode, string asmop> { + def ssi : NeonI_ScalarShiftImm_size { + bits<5> Imm; + let Inst{22-21} = 0b01; // immh:immb = 01xxxxx + let Inst{20-16} = Imm; + } + def ddi : NeonI_ScalarShiftImm_size { + bits<6> Imm; + let Inst{22} = 0b1; // immh:immb = 1xxxxxx + let Inst{21-16} = Imm; + } +} + multiclass Neon_ScalarShiftImm_D_size_patterns { def ddi : Pat<(v1i64 (opnode (v1i64 FPR64:$Rn), (i32 imm:$Imm))), @@ -3645,6 +3658,16 @@ multiclass Neon_ScalarShiftImm_narrow_HSD_size_patterns< (INSTD FPR64:$Rn, imm:$Imm)>; } +multiclass Neon_ScalarShiftImm_scvtf_SD_size_patterns { + def ssi : Pat<(v1f32 (Sopnode (v1i32 FPR32:$Rn), (i32 imm:$Imm))), + (INSTS FPR32:$Rn, imm:$Imm)>; + def ddi : Pat<(v1f64 (Dopnode (v1i64 FPR64:$Rn), (i32 imm:$Imm))), + (INSTD FPR64:$Rn, imm:$Imm)>; +} + // Scalar Signed Shift Right (Immediate) defm SSHR : NeonI_ScalarShiftRightImm_D_size<0b0, 0b00000, "sshr">; defm : Neon_ScalarShiftImm_D_size_patterns; @@ -3743,6 +3766,18 @@ defm : Neon_ScalarShiftImm_narrow_HSD_size_patterns; +// Scalar Signed Fixed-point Convert To Floating-Point (Immediate) +defm SCVTF_N : NeonI_ScalarShiftImm_scvtf_SD_size<0b0, 0b11100, "scvtf">; +defm : Neon_ScalarShiftImm_scvtf_SD_size_patterns; + +// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) +defm UCVTF_N : NeonI_ScalarShiftImm_scvtf_SD_size<0b1, 0b11100, "ucvtf">; +defm : Neon_ScalarShiftImm_scvtf_SD_size_patterns; + // Scalar Integer Add let isCommutable = 1 in { def ADDddd : NeonI_Scalar3Same_D_size<0b0, 0b10000, "add">; diff --git a/test/CodeGen/AArch64/neon-scalar-cvt.ll b/test/CodeGen/AArch64/neon-scalar-cvt.ll index 0d9fdf3c973..056504a67e8 100644 --- a/test/CodeGen/AArch64/neon-scalar-cvt.ll +++ b/test/CodeGen/AArch64/neon-scalar-cvt.ll @@ -47,3 +47,51 @@ entry: } declare <1 x double> @llvm.aarch64.neon.vcvtf64.u64(<1 x i64>) + +define float @test_vcvts_n_f32_s32(i32 %a) { +; CHECK: test_vcvts_n_f32_s32 +; CHECK: scvtf {{s[0-9]+}}, {{s[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0 + %vcvtf1 = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32> %vcvtf, i32 1) + %0 = extractelement <1 x float> %vcvtf1, i32 0 + ret float %0 +} + +declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32>, i32) + +define double @test_vcvtd_n_f64_s64(i64 %a) { +; CHECK: test_vcvtd_n_f64_s64 +; CHECK: scvtf {{d[0-9]+}}, {{d[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0 + %vcvtf1 = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64> %vcvtf, i32 1) + %0 = extractelement <1 x double> %vcvtf1, i32 0 + ret double %0 +} + +declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64>, i32) + +define float @test_vcvts_n_f32_u32(i32 %a) { +; CHECK: test_vcvts_n_f32_u32 +; CHECK: ucvtf {{s[0-9]+}}, {{s[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0 + %vcvtf1 = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32> %vcvtf, i32 1) + %0 = extractelement <1 x float> %vcvtf1, i32 0 + ret float %0 +} + +declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32>, i32) + +define double @test_vcvtd_n_f64_u64(i64 %a) { +; CHECK: test_vcvtd_n_f64_u64 +; CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0 + %vcvtf1 = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64> %vcvtf, i32 1) + %0 = extractelement <1 x double> %vcvtf1, i32 0 + ret double %0 +} + +declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64>, i32) diff --git a/test/MC/AArch64/neon-diagnostics.s b/test/MC/AArch64/neon-diagnostics.s index f94c483066f..4e1207f0316 100644 --- a/test/MC/AArch64/neon-diagnostics.s +++ b/test/MC/AArch64/neon-diagnostics.s @@ -4992,3 +4992,43 @@ // CHECK-ERROR: error: expected integer in range [1, 32] // CHECK-ERROR: sqrshrun s22, d16, #99 // CHECK-ERROR: ^ + +//---------------------------------------------------------------------- +// Scalar Signed Fixed-point Convert To Floating-Point (Immediate) +//---------------------------------------------------------------------- + + scvtf s22, s13, #0 + scvtf s22, s13, #33 + scvtf d21, d12, #65 + scvtf d21, s12, #31 + +// CHECK-ERROR: error: expected integer in range [1, 32] +// CHECK-ERROR: scvtf s22, s13, #0 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: expected integer in range [1, 32] +// CHECK-ERROR: scvtf s22, s13, #33 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: expected integer in range [1, 64] +// CHECK-ERROR: scvtf d21, d12, #65 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: invalid operand for instruction +// CHECK-ERROR: scvtf d21, s12, #31 +// CHECK-ERROR: ^ + +//---------------------------------------------------------------------- +// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) +//---------------------------------------------------------------------- + + ucvtf s22, s13, #34 + ucvtf d21, d14, #65 + ucvtf d21, s14, #64 + +// CHECK-ERROR: error: expected integer in range [1, 32] +// CHECK-ERROR: ucvtf s22, s13, #34 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: expected integer in range [1, 64] +// CHECK-ERROR: ucvtf d21, d14, #65 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: invalid operand for instruction +// CHECK-ERROR: ucvtf d21, s14, #64 +// CHECK-ERROR: ^ diff --git a/test/MC/AArch64/neon-scalar-cvt.s b/test/MC/AArch64/neon-scalar-cvt.s index 07faef74530..93115ad6489 100644 --- a/test/MC/AArch64/neon-scalar-cvt.s +++ b/test/MC/AArch64/neon-scalar-cvt.s @@ -21,3 +21,23 @@ // CHECK: ucvtf s22, s13 // encoding: [0xb6,0xd9,0x21,0x7e] // CHECK: ucvtf d21, d14 // encoding: [0xd5,0xd9,0x61,0x7e] + +//---------------------------------------------------------------------- +// Scalar Signed Fixed-point Convert To Floating-Point (Immediate) +//---------------------------------------------------------------------- + + scvtf s22, s13, #32 + scvtf d21, d12, #64 + +// CHECK: scvtf s22, s13, #32 // encoding: [0xb6,0xe5,0x20,0x5f] +// CHECK: scvtf d21, d12, #64 // encoding: [0x95,0xe5,0x40,0x5f] + +//---------------------------------------------------------------------- +// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) +//---------------------------------------------------------------------- + + ucvtf s22, s13, #32 + ucvtf d21, d14, #64 + +// CHECK: ucvtf s22, s13, #32 // encoding: [0xb6,0xe5,0x20,0x7f] +// CHECK: ucvtf d21, d14, #64 // encoding: [0xd5,0xe5,0x40,0x7f] diff --git a/test/MC/Disassembler/AArch64/neon-instructions.txt b/test/MC/Disassembler/AArch64/neon-instructions.txt index c63b65a280c..e97728283b3 100644 --- a/test/MC/Disassembler/AArch64/neon-instructions.txt +++ b/test/MC/Disassembler/AArch64/neon-instructions.txt @@ -1955,3 +1955,19 @@ 0x51,0x8d,0x0a,0x7f 0xaa,0x8d,0x11,0x7f 0x16,0x8e,0x21,0x7f + +#---------------------------------------------------------------------- +# Scalar Signed Fixed-point Convert To Floating-Point (Immediate) +#---------------------------------------------------------------------- +# CHECK: scvtf s22, s13, #32 +# CHECK: scvtf d21, d12, #64 +0xb6,0xe5,0x20,0x5f +0x95,0xe5,0x40,0x5f + +#---------------------------------------------------------------------- +# Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) +#---------------------------------------------------------------------- +# CHECK: ucvtf s22, s13, #32 +# CHECK: ucvtf d21, d14, #64 +0xb6,0xe5,0x20,0x7f +0xd5,0xe5,0x40,0x7f