From: Cameron McInally Date: Mon, 14 Oct 2019 15:35:01 +0000 (+0000) Subject: [IRBuilder] Update IRBuilder::CreateFNeg(...) to return a UnaryOperator X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=17184dc8a9ddf8debc83c573c01edf4188461626;p=clang [IRBuilder] Update IRBuilder::CreateFNeg(...) to return a UnaryOperator Reapply r374240 with fix for Ocaml test, namely Bindings/OCaml/core.ml. Differential Revision: https://reviews.llvm.org/D61675 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@374782 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/CGExprScalar.cpp b/lib/CodeGen/CGExprScalar.cpp index f3e03bec5e..a10b18c5c9 100644 --- a/lib/CodeGen/CGExprScalar.cpp +++ b/lib/CodeGen/CGExprScalar.cpp @@ -2576,14 +2576,16 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, Value *ScalarExprEmitter::VisitUnaryMinus(const UnaryOperator *E) { TestAndClearIgnoreResultAssign(); + Value *Op = Visit(E->getSubExpr()); + + // Generate a unary FNeg for FP ops. + if (Op->getType()->isFPOrFPVectorTy()) + return Builder.CreateFNeg(Op, "fneg"); + // Emit unary minus with EmitSub so we handle overflow cases etc. BinOpInfo BinOp; - BinOp.RHS = Visit(E->getSubExpr()); - - if (BinOp.RHS->getType()->isFPOrFPVectorTy()) - BinOp.LHS = llvm::ConstantFP::getZeroValueForNegation(BinOp.RHS->getType()); - else - BinOp.LHS = llvm::Constant::getNullValue(BinOp.RHS->getType()); + BinOp.RHS = Op; + BinOp.LHS = llvm::Constant::getNullValue(BinOp.RHS->getType()); BinOp.Ty = E->getType(); BinOp.Opcode = BO_Sub; // FIXME: once UnaryOperator carries FPFeatures, copy it here. diff --git a/test/CodeGen/aarch64-neon-2velem.c b/test/CodeGen/aarch64-neon-2velem.c index d8eae760b4..5db29344a0 100644 --- a/test/CodeGen/aarch64-neon-2velem.c +++ b/test/CodeGen/aarch64-neon-2velem.c @@ -333,7 +333,7 @@ float32x4_t test_vfmaq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) { } // CHECK-LABEL: @test_vfms_lane_f32( -// CHECK: [[SUB:%.*]] = fsub <2 x float> , %b +// CHECK: [[SUB:%.*]] = fneg <2 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x float> [[SUB]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %v to <8 x i8> @@ -348,7 +348,7 @@ float32x2_t test_vfms_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) { } // CHECK-LABEL: @test_vfmsq_lane_f32( -// CHECK: [[SUB:%.*]] = fsub <4 x float> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x float> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %v to <8 x i8> @@ -363,7 +363,7 @@ float32x4_t test_vfmsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) { } // CHECK-LABEL: @test_vfms_laneq_f32( -// CHECK: [[SUB:%.*]] = fsub <2 x float> , %b +// CHECK: [[SUB:%.*]] = fneg <2 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x float> [[SUB]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %v to <16 x i8> @@ -378,7 +378,7 @@ float32x2_t test_vfms_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) { } // CHECK-LABEL: @test_vfmsq_laneq_f32( -// CHECK: [[SUB:%.*]] = fsub <4 x float> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x float> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %v to <16 x i8> @@ -421,7 +421,7 @@ float64x2_t test_vfmaq_laneq_f64(float64x2_t a, float64x2_t b, float64x2_t v) { } // CHECK-LABEL: @test_vfmsq_lane_f64( -// CHECK: [[SUB:%.*]] = fsub <2 x double> , %b +// CHECK: [[SUB:%.*]] = fneg <2 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x double> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8> @@ -436,7 +436,7 @@ float64x2_t test_vfmsq_lane_f64(float64x2_t a, float64x2_t b, float64x1_t v) { } // CHECK-LABEL: @test_vfmsq_laneq_f64( -// CHECK: [[SUB:%.*]] = fsub <2 x double> , %b +// CHECK: [[SUB:%.*]] = fneg <2 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x double> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8> @@ -459,7 +459,7 @@ float32_t test_vfmas_laneq_f32(float32_t a, float32_t b, float32x4_t v) { } // CHECK-LABEL: @test_vfmsd_lane_f64( -// CHECK: [[SUB:%.*]] = fsub double -0.000000e+00, %b +// CHECK: [[SUB:%.*]] = fneg double %b // CHECK: [[EXTRACT:%.*]] = extractelement <1 x double> %v, i32 0 // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double [[SUB]], double [[EXTRACT]], double %a) // CHECK: ret double [[TMP2]] @@ -468,7 +468,7 @@ float64_t test_vfmsd_lane_f64(float64_t a, float64_t b, float64x1_t v) { } // CHECK-LABEL: @test_vfmss_laneq_f32( -// CHECK: [[SUB:%.*]] = fsub float -0.000000e+00, %b +// CHECK: [[SUB:%.*]] = fneg float %b // CHECK: [[EXTRACT:%.*]] = extractelement <4 x float> %v, i32 3 // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a) // CHECK: ret float [[TMP2]] @@ -477,7 +477,7 @@ float32_t test_vfmss_laneq_f32(float32_t a, float32_t b, float32x4_t v) { } // CHECK-LABEL: @test_vfmsd_laneq_f64( -// CHECK: [[SUB:%.*]] = fsub double -0.000000e+00, %b +// CHECK: [[SUB:%.*]] = fneg double %b // CHECK: [[EXTRACT:%.*]] = extractelement <2 x double> %v, i32 1 // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double [[SUB]], double [[EXTRACT]], double %a) // CHECK: ret double [[TMP2]] @@ -1767,7 +1767,7 @@ float32x4_t test_vfmaq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v) } // CHECK-LABEL: @test_vfms_lane_f32_0( -// CHECK: [[SUB:%.*]] = fsub <2 x float> , %b +// CHECK: [[SUB:%.*]] = fneg <2 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x float> [[SUB]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %v to <8 x i8> @@ -1782,7 +1782,7 @@ float32x2_t test_vfms_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) { } // CHECK-LABEL: @test_vfmsq_lane_f32_0( -// CHECK: [[SUB:%.*]] = fsub <4 x float> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x float> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %v to <8 x i8> @@ -1797,7 +1797,7 @@ float32x4_t test_vfmsq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) { } // CHECK-LABEL: @test_vfms_laneq_f32_0( -// CHECK: [[SUB:%.*]] = fsub <2 x float> , %b +// CHECK: [[SUB:%.*]] = fneg <2 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x float> [[SUB]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %v to <16 x i8> @@ -1812,7 +1812,7 @@ float32x2_t test_vfms_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) { } // CHECK-LABEL: @test_vfmsq_laneq_f32_0( -// CHECK: [[SUB:%.*]] = fsub <4 x float> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x float> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %v to <16 x i8> @@ -1841,7 +1841,7 @@ float64x2_t test_vfmaq_laneq_f64_0(float64x2_t a, float64x2_t b, float64x2_t v) } // CHECK-LABEL: @test_vfmsq_laneq_f64_0( -// CHECK: [[SUB:%.*]] = fsub <2 x double> , %b +// CHECK: [[SUB:%.*]] = fneg <2 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x double> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8> @@ -3101,7 +3101,7 @@ float32x4_t test_vfmaq_n_f32(float32x4_t a, float32x4_t b, float32_t n) { } // CHECK-LABEL: @test_vfms_n_f32( -// CHECK: [[SUB_I:%.*]] = fsub <2 x float> , %b +// CHECK: [[SUB_I:%.*]] = fneg <2 x float> %b // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %n, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %n, i32 1 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> @@ -3114,7 +3114,7 @@ float32x2_t test_vfms_n_f32(float32x2_t a, float32x2_t b, float32_t n) { } // CHECK-LABEL: @test_vfms_n_f64( -// CHECK: [[SUB_I:%.*]] = fsub <1 x double> , %b +// CHECK: [[SUB_I:%.*]] = fneg <1 x double> %b // CHECK: [[VECINIT_I:%.*]] = insertelement <1 x double> undef, double %n, i32 0 // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB_I]] to <8 x i8> @@ -3126,7 +3126,7 @@ float64x1_t test_vfms_n_f64(float64x1_t a, float64x1_t b, float64_t n) { } // CHECK-LABEL: @test_vfmsq_n_f32( -// CHECK: [[SUB_I:%.*]] = fsub <4 x float> , %b +// CHECK: [[SUB_I:%.*]] = fneg <4 x float> %b // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %n, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %n, i32 1 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %n, i32 2 diff --git a/test/CodeGen/aarch64-neon-fma.c b/test/CodeGen/aarch64-neon-fma.c index 564bd37e78..ae02bfbffb 100644 --- a/test/CodeGen/aarch64-neon-fma.c +++ b/test/CodeGen/aarch64-neon-fma.c @@ -221,7 +221,7 @@ float64x2_t test_vfmaq_n_f64(float64x2_t a, float64x2_t b, float64_t c) { } // CHECK-LABEL: define <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 { -// CHECK: [[SUB_I:%.*]] = fsub <2 x double> , %b +// CHECK: [[SUB_I:%.*]] = fneg <2 x double> %b // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1 // CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[SUB_I]], <2 x double> [[VECINIT1_I]], <2 x double> %a) #3 diff --git a/test/CodeGen/aarch64-neon-intrinsics.c b/test/CodeGen/aarch64-neon-intrinsics.c index 5e35a2dc4d..b29d877dd8 100644 --- a/test/CodeGen/aarch64-neon-intrinsics.c +++ b/test/CodeGen/aarch64-neon-intrinsics.c @@ -666,7 +666,7 @@ float64x2_t test_vfmaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) { } // CHECK-LABEL: @test_vfms_f32( -// CHECK: [[SUB_I:%.*]] = fsub <2 x float> , %v2 +// CHECK: [[SUB_I:%.*]] = fneg <2 x float> %v2 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %v1 to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x float> [[SUB_I]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %v3 to <8 x i8> @@ -677,7 +677,7 @@ float32x2_t test_vfms_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) { } // CHECK-LABEL: @test_vfmsq_f32( -// CHECK: [[SUB_I:%.*]] = fsub <4 x float> , %v2 +// CHECK: [[SUB_I:%.*]] = fneg <4 x float> %v2 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %v1 to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x float> [[SUB_I]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %v3 to <16 x i8> @@ -688,7 +688,7 @@ float32x4_t test_vfmsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) { } // CHECK-LABEL: @test_vfmsq_f64( -// CHECK: [[SUB_I:%.*]] = fsub <2 x double> , %v2 +// CHECK: [[SUB_I:%.*]] = fneg <2 x double> %v2 // CHECK: [[TMP0:%.*]] = bitcast <2 x double> %v1 to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x double> [[SUB_I]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v3 to <16 x i8> @@ -17844,7 +17844,7 @@ float64x1_t test_vfma_f64(float64x1_t a, float64x1_t b, float64x1_t c) { } // CHECK-LABEL: @test_vfms_f64( -// CHECK: [[SUB_I:%.*]] = fsub <1 x double> , %b +// CHECK: [[SUB_I:%.*]] = fneg <1 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB_I]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %c to <8 x i8> @@ -17915,7 +17915,7 @@ float64x1_t test_vabs_f64(float64x1_t a) { } // CHECK-LABEL: @test_vneg_f64( -// CHECK: [[SUB_I:%.*]] = fsub <1 x double> , %a +// CHECK: [[SUB_I:%.*]] = fneg <1 x double> %a // CHECK: ret <1 x double> [[SUB_I]] float64x1_t test_vneg_f64(float64x1_t a) { return vneg_f64(a); diff --git a/test/CodeGen/aarch64-neon-misc.c b/test/CodeGen/aarch64-neon-misc.c index f8ba7ee712..acc3c0b7d2 100644 --- a/test/CodeGen/aarch64-neon-misc.c +++ b/test/CodeGen/aarch64-neon-misc.c @@ -1286,21 +1286,21 @@ int64x2_t test_vnegq_s64(int64x2_t a) { } // CHECK-LABEL: @test_vneg_f32( -// CHECK: [[SUB_I:%.*]] = fsub <2 x float> , %a +// CHECK: [[SUB_I:%.*]] = fneg <2 x float> %a // CHECK: ret <2 x float> [[SUB_I]] float32x2_t test_vneg_f32(float32x2_t a) { return vneg_f32(a); } // CHECK-LABEL: @test_vnegq_f32( -// CHECK: [[SUB_I:%.*]] = fsub <4 x float> , %a +// CHECK: [[SUB_I:%.*]] = fneg <4 x float> %a // CHECK: ret <4 x float> [[SUB_I]] float32x4_t test_vnegq_f32(float32x4_t a) { return vnegq_f32(a); } // CHECK-LABEL: @test_vnegq_f64( -// CHECK: [[SUB_I:%.*]] = fsub <2 x double> , %a +// CHECK: [[SUB_I:%.*]] = fneg <2 x double> %a // CHECK: ret <2 x double> [[SUB_I]] float64x2_t test_vnegq_f64(float64x2_t a) { return vnegq_f64(a); diff --git a/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c b/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c index 5ec2555055..836e4dbd99 100644 --- a/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c +++ b/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c @@ -136,7 +136,7 @@ float64_t test_vfmad_laneq_f64(float64_t a, float64_t b, float64x2_t c) { } // CHECK-LABEL: define float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 { -// CHECK: [[SUB:%.*]] = fsub float -0.000000e+00, %b +// CHECK: [[SUB:%.*]] = fneg float %b // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a) // CHECK: ret float [[TMP2]] @@ -159,7 +159,7 @@ float64x1_t test_vfma_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) { } // CHECK-LABEL: define <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 { -// CHECK: [[SUB:%.*]] = fsub <1 x double> , %b +// CHECK: [[SUB:%.*]] = fneg <1 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8> @@ -189,7 +189,7 @@ float64x1_t test_vfma_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) { } // CHECK-LABEL: define <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 { -// CHECK: [[SUB:%.*]] = fsub <1 x double> , %b +// CHECK: [[SUB:%.*]] = fneg <1 x double> %b // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8> diff --git a/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c b/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c index b8e1f92a25..45b18453b8 100644 --- a/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c +++ b/test/CodeGen/aarch64-v8.2a-fp16-intrinsics.c @@ -315,7 +315,7 @@ uint64_t test_vcvtph_u64_f16 (float16_t a) { } // CHECK-LABEL: test_vnegh_f16 -// CHECK: [[NEG:%.*]] = fsub half 0xH8000, %a +// CHECK: [[NEG:%.*]] = fneg half %a // CHECK: ret half [[NEG]] float16_t test_vnegh_f16(float16_t a) { return vnegh_f16(a); diff --git a/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c b/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c index dc15923a41..55e91c2ca6 100644 --- a/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c +++ b/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c @@ -264,14 +264,14 @@ uint16x8_t test_vcvtpq_u16_f16 (float16x8_t a) { // FIXME: Fix the zero constant when fp16 non-storage-only type becomes available. // CHECK-LABEL: test_vneg_f16 -// CHECK: [[NEG:%.*]] = fsub <4 x half> , %a +// CHECK: [[NEG:%.*]] = fneg <4 x half> %a // CHECK: ret <4 x half> [[NEG]] float16x4_t test_vneg_f16(float16x4_t a) { return vneg_f16(a); } // CHECK-LABEL: test_vnegq_f16 -// CHECK: [[NEG:%.*]] = fsub <8 x half> , %a +// CHECK: [[NEG:%.*]] = fneg <8 x half> %a // CHECK: ret <8 x half> [[NEG]] float16x8_t test_vnegq_f16(float16x8_t a) { return vnegq_f16(a); @@ -862,7 +862,7 @@ float16x8_t test_vfmaq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { } // CHECK-LABEL: test_vfms_f16 -// CHECK: [[SUB:%.*]] = fsub <4 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x half> %b // CHECK: [[ADD:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[SUB]], <4 x half> %c, <4 x half> %a) // CHECK: ret <4 x half> [[ADD]] float16x4_t test_vfms_f16(float16x4_t a, float16x4_t b, float16x4_t c) { @@ -870,7 +870,7 @@ float16x4_t test_vfms_f16(float16x4_t a, float16x4_t b, float16x4_t c) { } // CHECK-LABEL: test_vfmsq_f16 -// CHECK: [[SUB:%.*]] = fsub <8 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <8 x half> %b // CHECK: [[ADD:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[SUB]], <8 x half> %c, <8 x half> %a) // CHECK: ret <8 x half> [[ADD]] float16x8_t test_vfmsq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { @@ -976,7 +976,7 @@ float16_t test_vfmah_laneq_f16(float16_t a, float16_t b, float16x8_t c) { } // CHECK-LABEL: test_vfms_lane_f16 -// CHECK: [[SUB:%.*]] = fsub <4 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x half> %b // CHECK: [[TMP0:%.*]] = bitcast <4 x half> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x half> [[SUB]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x half> %c to <8 x i8> @@ -991,7 +991,7 @@ float16x4_t test_vfms_lane_f16(float16x4_t a, float16x4_t b, float16x4_t c) { } // CHECK-LABEL: test_vfmsq_lane_f16 -// CHECK: [[SUB:%.*]] = fsub <8 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <8 x half> %b // CHECK: [[TMP0:%.*]] = bitcast <8 x half> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x half> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x half> %c to <8 x i8> @@ -1006,7 +1006,7 @@ float16x8_t test_vfmsq_lane_f16(float16x8_t a, float16x8_t b, float16x4_t c) { } // CHECK-LABEL: test_vfms_laneq_f16 -// CHECK: [[SUB:%.*]] = fsub <4 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x half> %b // CHECK: [[TMP0:%.*]] = bitcast <4 x half> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x half> [[SUB]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x half> %c to <16 x i8> @@ -1021,7 +1021,7 @@ float16x4_t test_vfms_laneq_f16(float16x4_t a, float16x4_t b, float16x8_t c) { } // CHECK-LABEL: test_vfmsq_laneq_f16 -// CHECK: [[SUB:%.*]] = fsub <8 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <8 x half> %b // CHECK: [[TMP0:%.*]] = bitcast <8 x half> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <8 x half> [[SUB]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x half> %c to <16 x i8> @@ -1036,7 +1036,7 @@ float16x8_t test_vfmsq_laneq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { } // CHECK-LABEL: test_vfms_n_f16 -// CHECK: [[SUB:%.*]] = fsub <4 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x half> %b // CHECK: [[TMP0:%.*]] = insertelement <4 x half> undef, half %c, i32 0 // CHECK: [[TMP1:%.*]] = insertelement <4 x half> [[TMP0]], half %c, i32 1 // CHECK: [[TMP2:%.*]] = insertelement <4 x half> [[TMP1]], half %c, i32 2 @@ -1048,7 +1048,7 @@ float16x4_t test_vfms_n_f16(float16x4_t a, float16x4_t b, float16_t c) { } // CHECK-LABEL: test_vfmsq_n_f16 -// CHECK: [[SUB:%.*]] = fsub <8 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <8 x half> %b // CHECK: [[TMP0:%.*]] = insertelement <8 x half> undef, half %c, i32 0 // CHECK: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half %c, i32 1 // CHECK: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half %c, i32 2 @@ -1065,7 +1065,7 @@ float16x8_t test_vfmsq_n_f16(float16x8_t a, float16x8_t b, float16_t c) { // CHECK-LABEL: test_vfmsh_lane_f16 // CHECK: [[TMP0:%.*]] = fpext half %b to float -// CHECK: [[TMP1:%.*]] = fsub float -0.000000e+00, [[TMP0]] +// CHECK: [[TMP1:%.*]] = fneg float [[TMP0]] // CHECK: [[SUB:%.*]] = fptrunc float [[TMP1]] to half // CHECK: [[EXTR:%.*]] = extractelement <4 x half> %c, i32 3 // CHECK: [[FMA:%.*]] = call half @llvm.fma.f16(half [[SUB]], half [[EXTR]], half %a) @@ -1076,7 +1076,7 @@ float16_t test_vfmsh_lane_f16(float16_t a, float16_t b, float16x4_t c) { // CHECK-LABEL: test_vfmsh_laneq_f16 // CHECK: [[TMP0:%.*]] = fpext half %b to float -// CHECK: [[TMP1:%.*]] = fsub float -0.000000e+00, [[TMP0]] +// CHECK: [[TMP1:%.*]] = fneg float [[TMP0]] // CHECK: [[SUB:%.*]] = fptrunc float [[TMP1]] to half // CHECK: [[EXTR:%.*]] = extractelement <8 x half> %c, i32 7 // CHECK: [[FMA:%.*]] = call half @llvm.fma.f16(half [[SUB]], half [[EXTR]], half %a) diff --git a/test/CodeGen/arm-v8.2a-neon-intrinsics.c b/test/CodeGen/arm-v8.2a-neon-intrinsics.c index 58d911d3ff..4b48ba01c4 100644 --- a/test/CodeGen/arm-v8.2a-neon-intrinsics.c +++ b/test/CodeGen/arm-v8.2a-neon-intrinsics.c @@ -264,14 +264,14 @@ uint16x8_t test_vcvtpq_u16_f16 (float16x8_t a) { // FIXME: Fix the zero constant when fp16 non-storage-only type becomes available. // CHECK-LABEL: test_vneg_f16 -// CHECK: [[NEG:%.*]] = fsub <4 x half> , %a +// CHECK: [[NEG:%.*]] = fneg <4 x half> %a // CHECK: ret <4 x half> [[NEG]] float16x4_t test_vneg_f16(float16x4_t a) { return vneg_f16(a); } // CHECK-LABEL: test_vnegq_f16 -// CHECK: [[NEG:%.*]] = fsub <8 x half> , %a +// CHECK: [[NEG:%.*]] = fneg <8 x half> %a // CHECK: ret <8 x half> [[NEG]] float16x8_t test_vnegq_f16(float16x8_t a) { return vnegq_f16(a); @@ -757,7 +757,7 @@ float16x8_t test_vfmaq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { } // CHECK-LABEL: test_vfms_f16 -// CHECK: [[SUB:%.*]] = fsub <4 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <4 x half> %b // CHECK: [[ADD:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[SUB]], <4 x half> %c, <4 x half> %a) // CHECK: ret <4 x half> [[ADD]] float16x4_t test_vfms_f16(float16x4_t a, float16x4_t b, float16x4_t c) { @@ -765,7 +765,7 @@ float16x4_t test_vfms_f16(float16x4_t a, float16x4_t b, float16x4_t c) { } // CHECK-LABEL: test_vfmsq_f16 -// CHECK: [[SUB:%.*]] = fsub <8 x half> , %b +// CHECK: [[SUB:%.*]] = fneg <8 x half> %b // CHECK: [[ADD:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[SUB]], <8 x half> %c, <8 x half> %a) // CHECK: ret <8 x half> [[ADD]] float16x8_t test_vfmsq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { diff --git a/test/CodeGen/arm_neon_intrinsics.c b/test/CodeGen/arm_neon_intrinsics.c index 93b11b2c52..077f128b7a 100644 --- a/test/CodeGen/arm_neon_intrinsics.c +++ b/test/CodeGen/arm_neon_intrinsics.c @@ -3207,7 +3207,7 @@ float32x4_t test_vfmaq_f32(float32x4_t a, float32x4_t b, float32x4_t c) { } // CHECK-LABEL: @test_vfms_f32( -// CHECK: [[SUB_I:%.*]] = fsub <2 x float> , %b +// CHECK: [[SUB_I:%.*]] = fneg <2 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> // CHECK: [[TMP1:%.*]] = bitcast <2 x float> [[SUB_I]] to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %c to <8 x i8> @@ -3218,7 +3218,7 @@ float32x2_t test_vfms_f32(float32x2_t a, float32x2_t b, float32x2_t c) { } // CHECK-LABEL: @test_vfmsq_f32( -// CHECK: [[SUB_I:%.*]] = fsub <4 x float> , %b +// CHECK: [[SUB_I:%.*]] = fneg <4 x float> %b // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> // CHECK: [[TMP1:%.*]] = bitcast <4 x float> [[SUB_I]] to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %c to <16 x i8> @@ -8810,7 +8810,7 @@ int32x2_t test_vneg_s32(int32x2_t a) { } // CHECK-LABEL: @test_vneg_f32( -// CHECK: [[SUB_I:%.*]] = fsub <2 x float> , %a +// CHECK: [[SUB_I:%.*]] = fneg <2 x float> %a // CHECK: ret <2 x float> [[SUB_I]] float32x2_t test_vneg_f32(float32x2_t a) { return vneg_f32(a); @@ -8838,7 +8838,7 @@ int32x4_t test_vnegq_s32(int32x4_t a) { } // CHECK-LABEL: @test_vnegq_f32( -// CHECK: [[SUB_I:%.*]] = fsub <4 x float> , %a +// CHECK: [[SUB_I:%.*]] = fneg <4 x float> %a // CHECK: ret <4 x float> [[SUB_I]] float32x4_t test_vnegq_f32(float32x4_t a) { return vnegq_f32(a); diff --git a/test/CodeGen/avx512f-builtins.c b/test/CodeGen/avx512f-builtins.c index 73a093c546..9296108f01 100644 --- a/test/CodeGen/avx512f-builtins.c +++ b/test/CodeGen/avx512f-builtins.c @@ -523,13 +523,13 @@ __m512d test_mm512_maskz_fmadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, } __m512d test_mm512_fmsub_round_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fmsub_round_pd - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 return _mm512_fmsub_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m512d test_mm512_mask_fmsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fmsub_round_pd - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -537,7 +537,7 @@ __m512d test_mm512_mask_fmsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, _ } __m512d test_mm512_maskz_fmsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fmsub_round_pd - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer @@ -545,13 +545,13 @@ __m512d test_mm512_maskz_fmsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, } __m512d test_mm512_fnmadd_round_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fnmadd_round_pd - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 return _mm512_fnmadd_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m512d test_mm512_mask3_fnmadd_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fnmadd_round_pd - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -559,7 +559,7 @@ __m512d test_mm512_mask3_fnmadd_round_pd(__m512d __A, __m512d __B, __m512d __C, } __m512d test_mm512_maskz_fnmadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fnmadd_round_pd - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer @@ -567,15 +567,15 @@ __m512d test_mm512_maskz_fnmadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, } __m512d test_mm512_fnmsub_round_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fnmsub_round_pd - // CHECK: fsub <8 x double> - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 return _mm512_fnmsub_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m512d test_mm512_maskz_fnmsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fnmsub_round_pd - // CHECK: fsub <8 x double> - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer @@ -609,13 +609,13 @@ __m512d test_mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512 } __m512d test_mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fmsub_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) return _mm512_fmsub_pd(__A, __B, __C); } __m512d test_mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fmsub_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -623,7 +623,7 @@ __m512d test_mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d } __m512d test_mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fmsub_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer @@ -631,13 +631,13 @@ __m512d test_mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512 } __m512d test_mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fnmadd_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) return _mm512_fnmadd_pd(__A, __B, __C); } __m512d test_mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fnmadd_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -645,7 +645,7 @@ __m512d test_mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmas } __m512d test_mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fnmadd_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer @@ -653,15 +653,15 @@ __m512d test_mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m51 } __m512d test_mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fnmsub_pd - // CHECK: fsub <8 x double> , %{{.*}} - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) return _mm512_fnmsub_pd(__A, __B, __C); } __m512d test_mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fnmsub_pd - // CHECK: fsub <8 x double> , %{{.*}} - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer @@ -695,13 +695,13 @@ __m512 test_mm512_maskz_fmadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __ } __m512 test_mm512_fmsub_round_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fmsub_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 return _mm512_fmsub_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m512 test_mm512_mask_fmsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fmsub_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -709,7 +709,7 @@ __m512 test_mm512_mask_fmsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m } __m512 test_mm512_maskz_fmsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fmsub_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer @@ -717,13 +717,13 @@ __m512 test_mm512_maskz_fmsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __ } __m512 test_mm512_fnmadd_round_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fnmadd_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 return _mm512_fnmadd_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m512 test_mm512_mask3_fnmadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fnmadd_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -731,7 +731,7 @@ __m512 test_mm512_mask3_fnmadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mm } __m512 test_mm512_maskz_fnmadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fnmadd_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer @@ -739,15 +739,15 @@ __m512 test_mm512_maskz_fnmadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, _ } __m512 test_mm512_fnmsub_round_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fnmsub_round_ps - // CHECK: fsub <16 x float> , %{{.*}} - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 return _mm512_fnmsub_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m512 test_mm512_maskz_fnmsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fnmsub_round_ps - // CHECK: fsub <16 x float> , %{{.*}} - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer @@ -779,13 +779,13 @@ __m512 test_mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 _ } __m512 test_mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fmsub_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) return _mm512_fmsub_ps(__A, __B, __C); } __m512 test_mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fmsub_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -793,7 +793,7 @@ __m512 test_mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __ } __m512 test_mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fmsub_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer @@ -801,13 +801,13 @@ __m512 test_mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 _ } __m512 test_mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fnmadd_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) return _mm512_fnmadd_ps(__A, __B, __C); } __m512 test_mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fnmadd_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -815,7 +815,7 @@ __m512 test_mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 } __m512 test_mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fnmadd_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer @@ -823,15 +823,15 @@ __m512 test_mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 } __m512 test_mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fnmsub_ps - // CHECK: fsub <16 x float> , %{{.*}} - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) return _mm512_fnmsub_ps(__A, __B, __C); } __m512 test_mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fnmsub_ps - // CHECK: fsub <16 x float> , %{{.*}} - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer @@ -865,13 +865,13 @@ __m512d test_mm512_maskz_fmaddsub_round_pd(__mmask8 __U, __m512d __A, __m512d __ } __m512d test_mm512_fmsubadd_round_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fmsubadd_round_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: @llvm.x86.avx512.vfmaddsub.pd.512 return _mm512_fmsubadd_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m512d test_mm512_mask_fmsubadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fmsubadd_round_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: @llvm.x86.avx512.vfmaddsub.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -879,7 +879,7 @@ __m512d test_mm512_mask_fmsubadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B } __m512d test_mm512_maskz_fmsubadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fmsubadd_round_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: @llvm.x86.avx512.vfmaddsub.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer @@ -888,7 +888,7 @@ __m512d test_mm512_maskz_fmsubadd_round_pd(__mmask8 __U, __m512d __A, __m512d __ __m512d test_mm512_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]] // CHECK: shufflevector <8 x double> [[SUB]], <8 x double> [[ADD]], <8 x i32> return _mm512_fmaddsub_pd(__A, __B, __C); @@ -896,7 +896,7 @@ __m512d test_mm512_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C) { __m512d test_mm512_mask_fmaddsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]] // CHECK: shufflevector <8 x double> [[SUB]], <8 x double> [[ADD]], <8 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -906,7 +906,7 @@ __m512d test_mm512_mask_fmaddsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m5 __m512d test_mm512_mask3_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]] // CHECK: shufflevector <8 x double> [[SUB]], <8 x double> [[ADD]], <8 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -916,7 +916,7 @@ __m512d test_mm512_mask3_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C, __mm __m512d test_mm512_maskz_fmaddsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]] // CHECK: shufflevector <8 x double> [[SUB]], <8 x double> [[ADD]], <8 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -925,7 +925,7 @@ __m512d test_mm512_maskz_fmaddsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m } __m512d test_mm512_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <8 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: shufflevector <8 x double> [[ADD]], <8 x double> [[SUB]], <8 x i32> @@ -933,7 +933,7 @@ __m512d test_mm512_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C) { } __m512d test_mm512_mask_fmsubadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <8 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: shufflevector <8 x double> [[ADD]], <8 x double> [[SUB]], <8 x i32> @@ -943,7 +943,7 @@ __m512d test_mm512_mask_fmsubadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m5 } __m512d test_mm512_maskz_fmsubadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_maskz_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <8 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: shufflevector <8 x double> [[ADD]], <8 x double> [[SUB]], <8 x i32> @@ -979,13 +979,13 @@ __m512 test_mm512_maskz_fmaddsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, } __m512 test_mm512_fmsubadd_round_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fmsubadd_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmaddsub.ps.512 return _mm512_fmsubadd_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m512 test_mm512_mask_fmsubadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fmsubadd_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmaddsub.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -993,7 +993,7 @@ __m512 test_mm512_mask_fmsubadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, } __m512 test_mm512_maskz_fmsubadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fmsubadd_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmaddsub.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer @@ -1002,7 +1002,7 @@ __m512 test_mm512_maskz_fmsubadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 test_mm512_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <16 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]] // CHECK: shufflevector <16 x float> [[SUB]], <16 x float> [[ADD]], <16 x i32> return _mm512_fmaddsub_ps(__A, __B, __C); @@ -1010,7 +1010,7 @@ __m512 test_mm512_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C) { __m512 test_mm512_mask_fmaddsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <16 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]] // CHECK: shufflevector <16 x float> [[SUB]], <16 x float> [[ADD]], <16 x i32> // CHECK: bitcast i16 %{{.*}} to <16 x i1> @@ -1020,7 +1020,7 @@ __m512 test_mm512_mask_fmaddsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __m512 test_mm512_mask3_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <16 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]] // CHECK: shufflevector <16 x float> [[SUB]], <16 x float> [[ADD]], <16 x i32> // CHECK: bitcast i16 %{{.*}} to <16 x i1> @@ -1030,7 +1030,7 @@ __m512 test_mm512_mask3_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask1 __m512 test_mm512_maskz_fmaddsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <16 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]] // CHECK: shufflevector <16 x float> [[SUB]], <16 x float> [[ADD]], <16 x i32> // CHECK: bitcast i16 %{{.*}} to <16 x i1> @@ -1039,7 +1039,7 @@ __m512 test_mm512_maskz_fmaddsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m51 } __m512 test_mm512_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <16 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: shufflevector <16 x float> [[ADD]], <16 x float> [[SUB]], <16 x i32> @@ -1047,7 +1047,7 @@ __m512 test_mm512_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C) { } __m512 test_mm512_mask_fmsubadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <16 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: shufflevector <16 x float> [[ADD]], <16 x float> [[SUB]], <16 x i32> @@ -1057,7 +1057,7 @@ __m512 test_mm512_mask_fmsubadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 } __m512 test_mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_maskz_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <16 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: shufflevector <16 x float> [[ADD]], <16 x float> [[SUB]], <16 x i32> @@ -1067,7 +1067,7 @@ __m512 test_mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m51 } __m512d test_mm512_mask3_fmsub_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fmsub_round_pd - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1075,7 +1075,7 @@ __m512d test_mm512_mask3_fmsub_round_pd(__m512d __A, __m512d __B, __m512d __C, _ } __m512d test_mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fmsub_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1083,7 +1083,7 @@ __m512d test_mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask } __m512 test_mm512_mask3_fmsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fmsub_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -1091,7 +1091,7 @@ __m512 test_mm512_mask3_fmsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mma } __m512 test_mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fmsub_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -1099,7 +1099,7 @@ __m512 test_mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 _ } __m512d test_mm512_mask3_fmsubadd_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fmsubadd_round_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: @llvm.x86.avx512.vfmaddsub.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1107,7 +1107,7 @@ __m512d test_mm512_mask3_fmsubadd_round_pd(__m512d __A, __m512d __B, __m512d __C } __m512d test_mm512_mask3_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <8 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: shufflevector <8 x double> [[ADD]], <8 x double> [[SUB]], <8 x i32> @@ -1117,7 +1117,7 @@ __m512d test_mm512_mask3_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C, __mm } __m512 test_mm512_mask3_fmsubadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fmsubadd_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmaddsub.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -1125,7 +1125,7 @@ __m512 test_mm512_mask3_fmsubadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __ } __m512 test_mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <16 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: shufflevector <16 x float> [[ADD]], <16 x float> [[SUB]], <16 x i32> @@ -1135,7 +1135,7 @@ __m512 test_mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask1 } __m512d test_mm512_mask_fnmadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fnmadd_round_pd - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1143,7 +1143,7 @@ __m512d test_mm512_mask_fnmadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, } __m512d test_mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fnmadd_pd - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1151,7 +1151,7 @@ __m512d test_mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512 } __m512 test_mm512_mask_fnmadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fnmadd_round_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -1159,7 +1159,7 @@ __m512 test_mm512_mask_fnmadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __ } __m512 test_mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fnmadd_ps - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -1167,8 +1167,8 @@ __m512 test_mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 _ } __m512d test_mm512_mask_fnmsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fnmsub_round_pd - // CHECK: fsub <8 x double> - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1176,8 +1176,8 @@ __m512d test_mm512_mask_fnmsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, } __m512d test_mm512_mask3_fnmsub_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fnmsub_round_pd - // CHECK: fsub <8 x double> - // CHECK: fsub <8 x double> + // CHECK: fneg <8 x double> + // CHECK: fneg <8 x double> // CHECK: @llvm.x86.avx512.vfmadd.pd.512 // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1185,8 +1185,8 @@ __m512d test_mm512_mask3_fnmsub_round_pd(__m512d __A, __m512d __B, __m512d __C, } __m512d test_mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_mask_fnmsub_pd - // CHECK: fsub <8 x double> , %{{.*}} - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1194,8 +1194,8 @@ __m512d test_mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512 } __m512d test_mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm512_mask3_fnmsub_pd - // CHECK: fsub <8 x double> , %{{.*}} - // CHECK: fsub <8 x double> , %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} + // CHECK: fneg <8 x double> %{{.*}} // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}} @@ -1203,8 +1203,8 @@ __m512d test_mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmas } __m512 test_mm512_mask_fnmsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fnmsub_round_ps - // CHECK: fsub <16 x float> , %{{.*}} - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -1212,8 +1212,8 @@ __m512 test_mm512_mask_fnmsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __ } __m512 test_mm512_mask3_fnmsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fnmsub_round_ps - // CHECK: fsub <16 x float> , %{{.*}} - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: @llvm.x86.avx512.vfmadd.ps.512 // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -1221,8 +1221,8 @@ __m512 test_mm512_mask3_fnmsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mm } __m512 test_mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { // CHECK-LABEL: @test_mm512_mask_fnmsub_ps - // CHECK: fsub <16 x float> , %{{.*}} - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -1230,8 +1230,8 @@ __m512 test_mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 _ } __m512 test_mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { // CHECK-LABEL: @test_mm512_mask3_fnmsub_ps - // CHECK: fsub <16 x float> , %{{.*}} - // CHECK: fsub <16 x float> , %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} + // CHECK: fneg <16 x float> %{{.*}} // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}) // CHECK: bitcast i16 %{{.*}} to <16 x i1> // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}} @@ -7521,7 +7521,7 @@ __m128 test_mm_mask3_fmadd_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __m128 test_mm_mask_fmsub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ // CHECK-LABEL: @test_mm_mask_fmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 0 @@ -7535,7 +7535,7 @@ __m128 test_mm_mask_fmsub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ __m128 test_mm_fmsub_round_ss(__m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_fmsub_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 0 @@ -7546,7 +7546,7 @@ __m128 test_mm_fmsub_round_ss(__m128 __A, __m128 __B, __m128 __C){ __m128 test_mm_mask_fmsub_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ // CHECK-LABEL: @test_mm_mask_fmsub_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 0 @@ -7560,7 +7560,7 @@ __m128 test_mm_mask_fmsub_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __m128 test_mm_maskz_fmsub_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_maskz_fmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 0 @@ -7574,7 +7574,7 @@ __m128 test_mm_maskz_fmsub_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){ __m128 test_mm_maskz_fmsub_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_maskz_fmsub_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 0 @@ -7588,7 +7588,7 @@ __m128 test_mm_maskz_fmsub_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __m128 test_mm_mask3_fmsub_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , [[ORIGC:%.+]] + // CHECK: [[NEG:%.+]] = fneg <4 x float> [[ORIGC:%.+]] // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 0 @@ -7603,7 +7603,7 @@ __m128 test_mm_mask3_fmsub_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){ __m128 test_mm_mask3_fmsub_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fmsub_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , [[ORIGC:%.+]] + // CHECK: [[NEG:%.+]] = fneg <4 x float> [[ORIGC:%.+]] // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 0 @@ -7618,7 +7618,7 @@ __m128 test_mm_mask3_fmsub_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __m128 test_mm_mask_fnmadd_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ // CHECK-LABEL: @test_mm_mask_fnmadd_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 @@ -7632,7 +7632,7 @@ __m128 test_mm_mask_fnmadd_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ __m128 test_mm_fnmadd_round_ss(__m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_fnmadd_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 @@ -7643,7 +7643,7 @@ __m128 test_mm_fnmadd_round_ss(__m128 __A, __m128 __B, __m128 __C){ __m128 test_mm_mask_fnmadd_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ // CHECK-LABEL: @test_mm_mask_fnmadd_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 @@ -7657,7 +7657,7 @@ __m128 test_mm_mask_fnmadd_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __m128 test_mm_maskz_fnmadd_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_maskz_fnmadd_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 @@ -7671,7 +7671,7 @@ __m128 test_mm_maskz_fnmadd_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) __m128 test_mm_maskz_fnmadd_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_maskz_fnmadd_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 @@ -7685,7 +7685,7 @@ __m128 test_mm_maskz_fnmadd_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m12 __m128 test_mm_mask3_fnmadd_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fnmadd_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[ORIGC:%.+]], i64 0 @@ -7699,7 +7699,7 @@ __m128 test_mm_mask3_fnmadd_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U) __m128 test_mm_mask3_fnmadd_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fnmadd_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[ORIGC:%.+]], i64 0 @@ -7713,8 +7713,8 @@ __m128 test_mm_mask3_fnmadd_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask __m128 test_mm_mask_fnmsub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ // CHECK-LABEL: @test_mm_mask_fnmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 0 @@ -7728,8 +7728,8 @@ __m128 test_mm_mask_fnmsub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ __m128 test_mm_fnmsub_round_ss(__m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_fnmsub_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 0 @@ -7740,8 +7740,8 @@ __m128 test_mm_fnmsub_round_ss(__m128 __A, __m128 __B, __m128 __C){ __m128 test_mm_mask_fnmsub_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){ // CHECK-LABEL: @test_mm_mask_fnmsub_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 0 @@ -7755,8 +7755,8 @@ __m128 test_mm_mask_fnmsub_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __m128 test_mm_maskz_fnmsub_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_maskz_fnmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 0 @@ -7770,8 +7770,8 @@ __m128 test_mm_maskz_fnmsub_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) __m128 test_mm_maskz_fnmsub_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){ // CHECK-LABEL: @test_mm_maskz_fnmsub_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 0 @@ -7785,8 +7785,8 @@ __m128 test_mm_maskz_fnmsub_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m12 __m128 test_mm_mask3_fnmsub_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fnmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , [[ORIGC:%.+]] + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> [[ORIGC:%.+]] // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 0 @@ -7801,8 +7801,8 @@ __m128 test_mm_mask3_fnmsub_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U) __m128 test_mm_mask3_fnmsub_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fnmsub_round_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , [[ORIGC:%.+]] + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> [[ORIGC:%.+]] // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 0 @@ -7905,7 +7905,7 @@ __m128d test_mm_mask3_fmadd_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mm __m128d test_mm_mask_fmsub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){ // CHECK-LABEL: @test_mm_mask_fmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 0 @@ -7919,7 +7919,7 @@ __m128d test_mm_mask_fmsub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __ __m128d test_mm_fmsub_round_sd(__m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_fmsub_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 0 @@ -7930,7 +7930,7 @@ __m128d test_mm_fmsub_round_sd(__m128d __A, __m128d __B, __m128d __C){ __m128d test_mm_mask_fmsub_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){ // CHECK-LABEL: @test_mm_mask_fmsub_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 0 @@ -7944,7 +7944,7 @@ __m128d test_mm_mask_fmsub_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m1 __m128d test_mm_maskz_fmsub_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_maskz_fmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 0 @@ -7958,7 +7958,7 @@ __m128d test_mm_maskz_fmsub_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d _ __m128d test_mm_maskz_fmsub_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_maskz_fmsub_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 0 @@ -7972,7 +7972,7 @@ __m128d test_mm_maskz_fmsub_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m __m128d test_mm_mask3_fmsub_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , [[ORIGC:%.+]] + // CHECK: [[NEG:%.+]] = fneg <2 x double> [[ORIGC:%.+]] // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 0 @@ -7987,7 +7987,7 @@ __m128d test_mm_mask3_fmsub_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 _ __m128d test_mm_mask3_fmsub_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fmsub_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , [[ORIGC:%.+]] + // CHECK: [[NEG:%.+]] = fneg <2 x double> [[ORIGC:%.+]] // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 0 @@ -8002,7 +8002,7 @@ __m128d test_mm_mask3_fmsub_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mm __m128d test_mm_mask_fnmadd_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){ // CHECK-LABEL: @test_mm_mask_fnmadd_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 @@ -8016,7 +8016,7 @@ __m128d test_mm_mask_fnmadd_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d _ __m128d test_mm_fnmadd_round_sd(__m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_fnmadd_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 @@ -8027,7 +8027,7 @@ __m128d test_mm_fnmadd_round_sd(__m128d __A, __m128d __B, __m128d __C){ __m128d test_mm_mask_fnmadd_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){ // CHECK-LABEL: @test_mm_mask_fnmadd_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 @@ -8041,7 +8041,7 @@ __m128d test_mm_mask_fnmadd_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m __m128d test_mm_maskz_fnmadd_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_maskz_fnmadd_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 @@ -8055,7 +8055,7 @@ __m128d test_mm_maskz_fnmadd_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __m128d test_mm_maskz_fnmadd_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_maskz_fnmadd_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 @@ -8069,7 +8069,7 @@ __m128d test_mm_maskz_fnmadd_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __ __m128d test_mm_mask3_fnmadd_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fnmadd_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[ORIGC:%.+]], i64 0 @@ -8083,7 +8083,7 @@ __m128d test_mm_mask3_fnmadd_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __m128d test_mm_mask3_fnmadd_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fnmadd_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[ORIGC:%.+]], i64 0 @@ -8097,8 +8097,8 @@ __m128d test_mm_mask3_fnmadd_round_sd(__m128d __W, __m128d __X, __m128d __Y, __m __m128d test_mm_mask_fnmsub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){ // CHECK-LABEL: @test_mm_mask_fnmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 0 @@ -8112,8 +8112,8 @@ __m128d test_mm_mask_fnmsub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d _ __m128d test_mm_fnmsub_round_sd(__m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_fnmsub_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 0 @@ -8124,8 +8124,8 @@ __m128d test_mm_fnmsub_round_sd(__m128d __A, __m128d __B, __m128d __C){ __m128d test_mm_mask_fnmsub_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){ // CHECK-LABEL: @test_mm_mask_fnmsub_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 0 @@ -8139,8 +8139,8 @@ __m128d test_mm_mask_fnmsub_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m __m128d test_mm_maskz_fnmsub_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_maskz_fnmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 0 @@ -8154,8 +8154,8 @@ __m128d test_mm_maskz_fnmsub_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __m128d test_mm_maskz_fnmsub_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){ // CHECK-LABEL: @test_mm_maskz_fnmsub_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 0 @@ -8169,8 +8169,8 @@ __m128d test_mm_maskz_fnmsub_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __ __m128d test_mm_mask3_fnmsub_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fnmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , [[ORIGC:%.+]] + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> [[ORIGC:%.+]] // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 0 @@ -8185,8 +8185,8 @@ __m128d test_mm_mask3_fnmsub_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __m128d test_mm_mask3_fnmsub_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){ // CHECK-LABEL: @test_mm_mask3_fnmsub_round_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , [[ORIGC:%.+]] + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> [[ORIGC:%.+]] // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 0 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 0 diff --git a/test/CodeGen/avx512vl-builtins.c b/test/CodeGen/avx512vl-builtins.c index 7f2064c2a3..81a689fff1 100644 --- a/test/CodeGen/avx512vl-builtins.c +++ b/test/CodeGen/avx512vl-builtins.c @@ -2845,7 +2845,7 @@ __m128d test_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __ __m128d test_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_mask_fmsub_pd - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -2864,7 +2864,7 @@ __m128d test_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 _ __m128d test_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fnmadd_pd - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -2883,7 +2883,7 @@ __m128d test_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d _ __m128d test_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_maskz_fmsub_pd - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -2893,7 +2893,7 @@ __m128d test_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d _ __m128d test_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_maskz_fnmadd_pd - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -2903,8 +2903,8 @@ __m128d test_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __m128d test_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_maskz_fnmsub_pd - // CHECK: fsub <2 x double> , %{{.*}} - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -2923,7 +2923,7 @@ __m256d test_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __m256d test_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_mask_fmsub_pd - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -2942,7 +2942,7 @@ __m256d test_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask __m256d test_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fnmadd_pd - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -2961,7 +2961,7 @@ __m256d test_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256 __m256d test_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_maskz_fmsub_pd - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -2971,7 +2971,7 @@ __m256d test_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256 __m256d test_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_maskz_fnmadd_pd - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -2981,8 +2981,8 @@ __m256d test_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m25 __m256d test_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_maskz_fnmsub_pd - // CHECK: fsub <4 x double> , %{{.*}} - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3001,7 +3001,7 @@ __m128 test_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { __m128 test_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_mask_fmsub_ps - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3020,7 +3020,7 @@ __m128 test_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) __m128 test_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fnmadd_ps - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3039,7 +3039,7 @@ __m128 test_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) __m128 test_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_maskz_fmsub_ps - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3049,7 +3049,7 @@ __m128 test_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) __m128 test_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_maskz_fnmadd_ps - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3059,8 +3059,8 @@ __m128 test_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) __m128 test_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_maskz_fnmsub_ps - // CHECK: fsub <4 x float> , %{{.*}} - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3078,7 +3078,7 @@ __m256 test_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C __m256 test_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_mask_fmsub_ps - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3095,7 +3095,7 @@ __m256 test_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __ __m256 test_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fnmadd_ps - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3112,7 +3112,7 @@ __m256 test_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __ __m256 test_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_maskz_fmsub_ps - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3121,7 +3121,7 @@ __m256 test_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __ __m256 test_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_maskz_fnmadd_ps - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3130,8 +3130,8 @@ __m256 test_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 _ __m256 test_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_maskz_fnmsub_ps - // CHECK: fsub <8 x float> , %{{.*}} - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3141,7 +3141,7 @@ __m256 test_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 _ __m128d test_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_mask_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3152,7 +3152,7 @@ __m128d test_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __m128d test_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_mask_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x i32> @@ -3165,7 +3165,7 @@ __m128d test_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __m128d test_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3177,7 +3177,7 @@ __m128d test_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask __m128d test_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_maskz_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3188,7 +3188,7 @@ __m128d test_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128 __m128d test_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_maskz_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x i32> @@ -3201,7 +3201,7 @@ __m128d test_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128 __m256d test_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_mask_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3212,7 +3212,7 @@ __m256d test_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m2 __m256d test_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_mask_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x i32> @@ -3225,7 +3225,7 @@ __m256d test_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m2 __m256d test_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3237,7 +3237,7 @@ __m256d test_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mm __m256d test_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_maskz_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3248,7 +3248,7 @@ __m256d test_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m __m256d test_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_maskz_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x i32> @@ -3261,7 +3261,7 @@ __m256d test_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m __m128 test_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_mask_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3272,7 +3272,7 @@ __m128 test_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C __m128 test_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_mask_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> @@ -3285,7 +3285,7 @@ __m128 test_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C __m128 test_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3297,7 +3297,7 @@ __m128 test_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __ __m128 test_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_maskz_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3308,7 +3308,7 @@ __m128 test_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __ __m128 test_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_maskz_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> @@ -3321,7 +3321,7 @@ __m128 test_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __ __m256 test_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_mask_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3331,7 +3331,7 @@ __m256 test_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __m256 test_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_mask_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> @@ -3343,7 +3343,7 @@ __m256 test_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __m256 test_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3354,7 +3354,7 @@ __m256 test_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __m256 test_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_maskz_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> // CHECK: bitcast i8 %{{.*}} to <8 x i1> @@ -3364,7 +3364,7 @@ __m256 test_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __m256 test_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_maskz_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> @@ -3375,7 +3375,7 @@ __m256 test_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __m128d test_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fmsub_pd - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -3385,7 +3385,7 @@ __m128d test_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 _ __m256d test_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fmsub_pd - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3395,7 +3395,7 @@ __m256d test_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask __m128 test_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fmsub_ps - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3405,7 +3405,7 @@ __m128 test_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) __m256 test_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fmsub_ps - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3414,7 +3414,7 @@ __m256 test_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __ __m128d test_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x i32> @@ -3426,7 +3426,7 @@ __m128d test_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask __m256d test_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x i32> @@ -3438,7 +3438,7 @@ __m256d test_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mm __m128 test_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> @@ -3450,7 +3450,7 @@ __m128 test_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __ __m256 test_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> @@ -3461,7 +3461,7 @@ __m256 test_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __m128d test_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_mask_fnmadd_pd - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -3471,7 +3471,7 @@ __m128d test_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d _ __m256d test_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_mask_fnmadd_pd - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3481,7 +3481,7 @@ __m256d test_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256 __m128 test_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_mask_fnmadd_ps - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3491,7 +3491,7 @@ __m128 test_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) __m256 test_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_mask_fnmadd_ps - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3500,8 +3500,8 @@ __m256 test_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __ __m128d test_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { // CHECK-LABEL: @test_mm_mask_fnmsub_pd - // CHECK: fsub <2 x double> , %{{.*}} - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -3511,8 +3511,8 @@ __m128d test_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d _ __m128d test_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fnmsub_pd - // CHECK: fsub <2 x double> , %{{.*}} - // CHECK: fsub <2 x double> , %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} + // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> @@ -3522,8 +3522,8 @@ __m128d test_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __m256d test_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { // CHECK-LABEL: @test_mm256_mask_fnmsub_pd - // CHECK: fsub <4 x double> , %{{.*}} - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3533,8 +3533,8 @@ __m256d test_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256 __m256d test_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fnmsub_pd - // CHECK: fsub <4 x double> , %{{.*}} - // CHECK: fsub <4 x double> , %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} + // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3544,8 +3544,8 @@ __m256d test_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmas __m128 test_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { // CHECK-LABEL: @test_mm_mask_fnmsub_ps - // CHECK: fsub <4 x float> , %{{.*}} - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3555,8 +3555,8 @@ __m128 test_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) __m128 test_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm_mask3_fnmsub_ps - // CHECK: fsub <4 x float> , %{{.*}} - // CHECK: fsub <4 x float> , %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} + // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> @@ -3566,8 +3566,8 @@ __m128 test_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) __m256 test_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { // CHECK-LABEL: @test_mm256_mask_fnmsub_ps - // CHECK: fsub <8 x float> , %{{.*}} - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3576,8 +3576,8 @@ __m256 test_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __ __m256 test_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { // CHECK-LABEL: @test_mm256_mask3_fnmsub_ps - // CHECK: fsub <8 x float> , %{{.*}} - // CHECK: fsub <8 x float> , %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} + // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: bitcast i8 %{{.*}} to <8 x i1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} diff --git a/test/CodeGen/builtins-ppc-vsx.c b/test/CodeGen/builtins-ppc-vsx.c index 0c797a389b..a19e75518a 100644 --- a/test/CodeGen/builtins-ppc-vsx.c +++ b/test/CodeGen/builtins-ppc-vsx.c @@ -77,11 +77,11 @@ void test1() { res_vf = vec_nabs(vf); // CHECK: [[VEC:%[0-9]+]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}}) -// CHECK-NEXT: fsub <4 x float> , [[VEC]] +// CHECK-NEXT: fneg <4 x float> [[VEC]] res_vd = vec_nabs(vd); // CHECK: [[VECD:%[0-9]+]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}}) -// CHECK: fsub <2 x double> , [[VECD]] +// CHECK: fneg <2 x double> [[VECD]] dummy(); // CHECK: call void @dummy() @@ -1686,12 +1686,12 @@ vec_xst_be(vd, sll, ad); // CHECK-LE: call void @llvm.ppc.vsx.stxvd2x.be(<2 x double> %{{[0-9]+}}, i8* %{{[0-9]+}}) res_vf = vec_neg(vf); -// CHECK: fsub <4 x float> , {{%[0-9]+}} -// CHECK-LE: fsub <4 x float> , {{%[0-9]+}} +// CHECK: fneg <4 x float> {{%[0-9]+}} +// CHECK-LE: fneg <4 x float> {{%[0-9]+}} res_vd = vec_neg(vd); -// CHECK: fsub <2 x double> , {{%[0-9]+}} -// CHECK-LE: fsub <2 x double> , {{%[0-9]+}} +// CHECK: fneg <2 x double> {{%[0-9]+}} +// CHECK-LE: fneg <2 x double> {{%[0-9]+}} res_vd = vec_xxpermdi(vd, vd, 0); // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> diff --git a/test/CodeGen/complex-math.c b/test/CodeGen/complex-math.c index 21cc5aebb1..e42418ad72 100644 --- a/test/CodeGen/complex-math.c +++ b/test/CodeGen/complex-math.c @@ -56,7 +56,7 @@ float _Complex sub_float_cr(float _Complex a, float b) { float _Complex sub_float_rc(float a, float _Complex b) { // X86-LABEL: @sub_float_rc( // X86: fsub - // X86: fsub float -0.{{0+}}e+00, + // X86: fneg // X86-NOT: fsub // X86: ret return a - b; @@ -234,7 +234,7 @@ double _Complex sub_double_cr(double _Complex a, double b) { double _Complex sub_double_rc(double a, double _Complex b) { // X86-LABEL: @sub_double_rc( // X86: fsub - // X86: fsub double -0.{{0+}}e+00, + // X86: fneg // X86-NOT: fsub // X86: ret return a - b; @@ -412,7 +412,7 @@ long double _Complex sub_long_double_cr(long double _Complex a, long double b) { long double _Complex sub_long_double_rc(long double a, long double _Complex b) { // X86-LABEL: @sub_long_double_rc( // X86: fsub - // X86: fsub x86_fp80 0xK8{{0+}}, + // X86: fneg // X86-NOT: fsub // X86: ret return a - b; diff --git a/test/CodeGen/exprs.c b/test/CodeGen/exprs.c index 14f58957bc..41b429cd30 100644 --- a/test/CodeGen/exprs.c +++ b/test/CodeGen/exprs.c @@ -143,7 +143,7 @@ int f12() { // Make sure negate of fp uses -0.0 for proper -0 handling. double f13(double X) { // CHECK-LABEL: define double @f13 - // CHECK: fsub double -0.0 + // CHECK: fneg double return -X; } diff --git a/test/CodeGen/fma-builtins.c b/test/CodeGen/fma-builtins.c index ff047f3d83..1118e0c582 100644 --- a/test/CodeGen/fma-builtins.c +++ b/test/CodeGen/fma-builtins.c @@ -37,21 +37,21 @@ __m128d test_mm_fmadd_sd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_fmsub_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_fmsub_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) return _mm_fmsub_ps(a, b, c); } __m128d test_mm_fmsub_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_fmsub_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) return _mm_fmsub_pd(a, b, c); } __m128 test_mm_fmsub_ss(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_fmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 @@ -62,7 +62,7 @@ __m128 test_mm_fmsub_ss(__m128 a, __m128 b, __m128 c) { __m128d test_mm_fmsub_sd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_fmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 @@ -73,21 +73,21 @@ __m128d test_mm_fmsub_sd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_fnmadd_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_fnmadd_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) return _mm_fnmadd_ps(a, b, c); } __m128d test_mm_fnmadd_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_fnmadd_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) return _mm_fnmadd_pd(a, b, c); } __m128 test_mm_fnmadd_ss(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_fnmadd_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 @@ -98,7 +98,7 @@ __m128 test_mm_fnmadd_ss(__m128 a, __m128 b, __m128 c) { __m128d test_mm_fnmadd_sd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_fnmadd_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 @@ -109,24 +109,24 @@ __m128d test_mm_fnmadd_sd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_fnmsub_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_fnmsub_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.+}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) return _mm_fnmsub_ps(a, b, c); } __m128d test_mm_fnmsub_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_fnmsub_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.+}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) return _mm_fnmsub_pd(a, b, c); } __m128 test_mm_fnmsub_ss(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_fnmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.+}} // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 @@ -137,8 +137,8 @@ __m128 test_mm_fnmsub_ss(__m128 a, __m128 b, __m128 c) { __m128d test_mm_fnmsub_sd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_fnmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.+}} // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 @@ -150,7 +150,7 @@ __m128d test_mm_fnmsub_sd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_fmaddsub_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> return _mm_fmaddsub_ps(a, b, c); @@ -159,7 +159,7 @@ __m128 test_mm_fmaddsub_ps(__m128 a, __m128 b, __m128 c) { __m128d test_mm_fmaddsub_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x i32> return _mm_fmaddsub_pd(a, b, c); @@ -167,7 +167,7 @@ __m128d test_mm_fmaddsub_pd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_fmsubadd_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> @@ -176,7 +176,7 @@ __m128 test_mm_fmsubadd_ps(__m128 a, __m128 b, __m128 c) { __m128d test_mm_fmsubadd_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x i32> @@ -197,44 +197,44 @@ __m256d test_mm256_fmadd_pd(__m256d a, __m256d b, __m256d c) { __m256 test_mm256_fmsub_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_fmsub_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) return _mm256_fmsub_ps(a, b, c); } __m256d test_mm256_fmsub_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_fmsub_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) return _mm256_fmsub_pd(a, b, c); } __m256 test_mm256_fnmadd_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_fnmadd_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) return _mm256_fnmadd_ps(a, b, c); } __m256d test_mm256_fnmadd_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_fnmadd_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) return _mm256_fnmadd_pd(a, b, c); } __m256 test_mm256_fnmsub_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_fnmsub_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) return _mm256_fnmsub_ps(a, b, c); } __m256d test_mm256_fnmsub_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_fnmsub_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <4 x double> %{{.+}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) return _mm256_fnmsub_pd(a, b, c); } @@ -242,7 +242,7 @@ __m256d test_mm256_fnmsub_pd(__m256d a, __m256d b, __m256d c) { __m256 test_mm256_fmaddsub_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_fmaddsub_ps // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> return _mm256_fmaddsub_ps(a, b, c); @@ -251,7 +251,7 @@ __m256 test_mm256_fmaddsub_ps(__m256 a, __m256 b, __m256 c) { __m256d test_mm256_fmaddsub_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_fmaddsub_pd // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x i32> return _mm256_fmaddsub_pd(a, b, c); @@ -259,7 +259,7 @@ __m256d test_mm256_fmaddsub_pd(__m256d a, __m256d b, __m256d c) { __m256 test_mm256_fmsubadd_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_fmsubadd_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> @@ -268,7 +268,7 @@ __m256 test_mm256_fmsubadd_ps(__m256 a, __m256 b, __m256 c) { __m256d test_mm256_fmsubadd_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_fmsubadd_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x i32> diff --git a/test/CodeGen/fma4-builtins.c b/test/CodeGen/fma4-builtins.c index 8078a6ed69..e24a9b3add 100644 --- a/test/CodeGen/fma4-builtins.c +++ b/test/CodeGen/fma4-builtins.c @@ -37,21 +37,21 @@ __m128d test_mm_macc_sd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_msub_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_msub_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) return _mm_msub_ps(a, b, c); } __m128d test_mm_msub_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_msub_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) return _mm_msub_pd(a, b, c); } __m128 test_mm_msub_ss(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_msub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 0 @@ -62,7 +62,7 @@ __m128 test_mm_msub_ss(__m128 a, __m128 b, __m128 c) { __m128d test_mm_msub_sd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_msub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 0 @@ -73,21 +73,21 @@ __m128d test_mm_msub_sd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_nmacc_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_nmacc_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) return _mm_nmacc_ps(a, b, c); } __m128d test_mm_nmacc_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_nmacc_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) return _mm_nmacc_pd(a, b, c); } __m128 test_mm_nmacc_ss(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_nmacc_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 @@ -98,7 +98,7 @@ __m128 test_mm_nmacc_ss(__m128 a, __m128 b, __m128 c) { __m128d test_mm_nmacc_sd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_nmacc_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 @@ -109,24 +109,24 @@ __m128d test_mm_nmacc_sd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_nmsub_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_nmsub_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.+}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) return _mm_nmsub_ps(a, b, c); } __m128d test_mm_nmsub_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_nmsub_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.+}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) return _mm_nmsub_pd(a, b, c); } __m128 test_mm_nmsub_ss(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_nmsub_ss - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[A:%.+]] = extractelement <4 x float> [[NEG]], i64 0 // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 0 @@ -137,8 +137,8 @@ __m128 test_mm_nmsub_ss(__m128 a, __m128 b, __m128 c) { __m128d test_mm_nmsub_sd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_nmsub_sd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[A:%.+]] = extractelement <2 x double> [[NEG]], i64 0 // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 0 @@ -150,7 +150,7 @@ __m128d test_mm_nmsub_sd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_maddsub_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_maddsub_ps // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> return _mm_maddsub_ps(a, b, c); @@ -159,7 +159,7 @@ __m128 test_mm_maddsub_ps(__m128 a, __m128 b, __m128 c) { __m128d test_mm_maddsub_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_maddsub_pd // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x i32> return _mm_maddsub_pd(a, b, c); @@ -167,7 +167,7 @@ __m128d test_mm_maddsub_pd(__m128d a, __m128d b, __m128d c) { __m128 test_mm_msubadd_ps(__m128 a, __m128 b, __m128 c) { // CHECK-LABEL: test_mm_msubadd_ps - // CHECK: [[NEG:%.+]] = fsub <4 x float> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> @@ -176,7 +176,7 @@ __m128 test_mm_msubadd_ps(__m128 a, __m128 b, __m128 c) { __m128d test_mm_msubadd_pd(__m128d a, __m128d b, __m128d c) { // CHECK-LABEL: test_mm_msubadd_pd - // CHECK: [[NEG:%.+]] = fsub <2 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x i32> @@ -197,44 +197,44 @@ __m256d test_mm256_macc_pd(__m256d a, __m256d b, __m256d c) { __m256 test_mm256_msub_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_msub_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) return _mm256_msub_ps(a, b, c); } __m256d test_mm256_msub_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_msub_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) return _mm256_msub_pd(a, b, c); } __m256 test_mm256_nmacc_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_nmacc_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) return _mm256_nmacc_ps(a, b, c); } __m256d test_mm256_nmacc_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_nmacc_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) return _mm256_nmacc_pd(a, b, c); } __m256 test_mm256_nmsub_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_nmsub_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} - // CHECK: [[NEG2:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} + // CHECK: [[NEG2:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) return _mm256_nmsub_ps(a, b, c); } __m256d test_mm256_nmsub_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_nmsub_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} - // CHECK: [[NEG2:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} + // CHECK: [[NEG2:%.+]] = fneg <4 x double> %{{.+}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) return _mm256_nmsub_pd(a, b, c); } @@ -242,7 +242,7 @@ __m256d test_mm256_nmsub_pd(__m256d a, __m256d b, __m256d c) { __m256 test_mm256_maddsub_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_maddsub_ps // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> return _mm256_maddsub_ps(a, b, c); @@ -251,7 +251,7 @@ __m256 test_mm256_maddsub_ps(__m256 a, __m256 b, __m256 c) { __m256d test_mm256_maddsub_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_maddsub_pd // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x i32> return _mm256_maddsub_pd(a, b, c); @@ -259,7 +259,7 @@ __m256d test_mm256_maddsub_pd(__m256d a, __m256d b, __m256d c) { __m256 test_mm256_msubadd_ps(__m256 a, __m256 b, __m256 c) { // CHECK-LABEL: test_mm256_msubadd_ps - // CHECK: [[NEG:%.+]] = fsub <8 x float> , %{{.*}} + // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]] // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> @@ -268,7 +268,7 @@ __m256 test_mm256_msubadd_ps(__m256 a, __m256 b, __m256 c) { __m256d test_mm256_msubadd_pd(__m256d a, __m256d b, __m256d c) { // CHECK-LABEL: test_mm256_msubadd_pd - // CHECK: [[NEG:%.+]] = fsub <4 x double> , %{{.+}} + // CHECK: [[NEG:%.+]] = fneg <4 x double> {{.+}} // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]] // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x i32> diff --git a/test/CodeGen/fp16-ops.c b/test/CodeGen/fp16-ops.c index f2ed667341..f74552b859 100644 --- a/test/CodeGen/fp16-ops.c +++ b/test/CodeGen/fp16-ops.c @@ -37,9 +37,9 @@ void foo(void) { // NATIVE-HALF: fcmp une half test = (!h1); // CHECK: [[F16TOF32]] - // CHECK: fsub float + // CHECK: fneg float // NOTNATIVE: [[F32TOF16]] - // NATIVE-HALF: fsub half + // NATIVE-HALF: fneg half h1 = -h1; // CHECK: [[F16TOF32]] // CHECK: [[F32TOF16]] diff --git a/test/CodeGen/zvector.c b/test/CodeGen/zvector.c index a8405a78e9..58fb60e918 100644 --- a/test/CodeGen/zvector.c +++ b/test/CodeGen/zvector.c @@ -108,7 +108,7 @@ void test_pos(void) { // CHECK: [[SUB3:%.*]] = sub <2 x i64> zeroinitializer, [[TMP3]] // CHECK: store volatile <2 x i64> [[SUB3]], <2 x i64>* @sl, align 8 // CHECK: [[TMP4:%.*]] = load volatile <2 x double>, <2 x double>* @fd2, align 8 -// CHECK: [[SUB4:%.*]] = fsub <2 x double> , [[TMP4]] +// CHECK: [[SUB4:%.*]] = fneg <2 x double> [[TMP4]] // CHECK: store volatile <2 x double> [[SUB4]], <2 x double>* @fd, align 8 // CHECK: ret void void test_neg(void) { diff --git a/test/CodeGen/zvector2.c b/test/CodeGen/zvector2.c index 909b3fd765..c085dc163c 100644 --- a/test/CodeGen/zvector2.c +++ b/test/CodeGen/zvector2.c @@ -24,7 +24,7 @@ void test_neg (void) { // CHECK-LABEL: test_neg // CHECK: [[VAL:%[^ ]+]] = load volatile <4 x float>, <4 x float>* @ff2 -// CHECK: %{{.*}} = fsub <4 x float> , [[VAL]] +// CHECK: %{{.*}} = fneg <4 x float> [[VAL]] ff = -ff2; }