From: Deomid Ryabkov Date: Mon, 19 Dec 2016 06:28:28 +0000 (+0000) Subject: Add IRAM_ATTR to esp_intr_{enable,disable} X-Git-Tag: v2.0-rc1~118^2 X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=1597f7a035fe213a3067eda4312cc4f7e896b962;p=esp-idf Add IRAM_ATTR to esp_intr_{enable,disable} So it's safe to invoke from ISR Signed-off-by: Jeroen Domburg --- diff --git a/components/esp32/intr_alloc.c b/components/esp32/intr_alloc.c index 57a6a97dea..9476a433d4 100644 --- a/components/esp32/intr_alloc.c +++ b/components/esp32/intr_alloc.c @@ -636,7 +636,7 @@ int esp_intr_get_cpu(intr_handle_t handle) //Muxing an interrupt source to interrupt 6, 7, 11, 15, 16 or 29 cause the interrupt to effectively be disabled. #define INT_MUX_DISABLED_INTNO 6 -esp_err_t esp_intr_enable(intr_handle_t handle) +esp_err_t IRAM_ATTR esp_intr_enable(intr_handle_t handle) { if (!handle) return ESP_ERR_INVALID_ARG; portENTER_CRITICAL(&spinlock); @@ -659,7 +659,7 @@ esp_err_t esp_intr_enable(intr_handle_t handle) return ESP_OK; } -esp_err_t esp_intr_disable(intr_handle_t handle) +esp_err_t IRAM_ATTR esp_intr_disable(intr_handle_t handle) { if (!handle) return ESP_ERR_INVALID_ARG; portENTER_CRITICAL(&spinlock);