From: Simon Pilgrim Date: Sun, 13 Aug 2017 20:35:38 +0000 (+0000) Subject: [X86][BMI] Add BEXTR demanded bits test cases (PR34042) X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=13a58815239cfab76c77444db174c1209f0ad075;p=llvm [X86][BMI] Add BEXTR demanded bits test cases (PR34042) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310802 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll index 50e9ab5f145..f6f72fb0cf5 100644 --- a/test/CodeGen/X86/bmi.ll +++ b/test/CodeGen/X86/bmi.ll @@ -323,6 +323,18 @@ define i32 @bextr32b_load(i32* %x) uwtable ssp { ret i32 %3 } +; PR34042 +define i32 @bextr32c(i32 %x, i16 zeroext %y) { +; CHECK-LABEL: bextr32c: +; CHECK: # BB#0: +; CHECK-NEXT: movswl %si, %eax +; CHECK-NEXT: bextrl %eax, %edi, %eax +; CHECK-NEXT: retq + %tmp0 = sext i16 %y to i32 + %tmp1 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %tmp0) + ret i32 %tmp1 +} + define i64 @bextr64(i64 %x, i64 %y) { ; CHECK-LABEL: bextr64: ; CHECK: # BB#0: @@ -357,6 +369,18 @@ define i64 @bextr64b_load(i64* %x) { ret i64 %3 } +; PR34042 +define i64 @bextr64c(i64 %x, i32 %y) { +; CHECK-LABEL: bextr64c: +; CHECK: # BB#0: +; CHECK-NEXT: movslq %esi, %rax +; CHECK-NEXT: bextrq %rax, %rdi, %rax +; CHECK-NEXT: retq + %tmp0 = sext i32 %y to i64 + %tmp1 = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %tmp0) + ret i64 %tmp1 +} + define i32 @non_bextr32(i32 %x) { ; CHECK-LABEL: non_bextr32: ; CHECK: # BB#0: # %entry