From: Zvi Rackover <zvi.rackover@intel.com>
Date: Wed, 6 Dec 2017 17:51:46 +0000 (+0000)
Subject: InstructionSimplify: 'extractelement' with an undef index is undef
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=138b4f2021616956704bb8d9839abb1ce17bb8c9;p=llvm

InstructionSimplify: 'extractelement' with an undef index is undef

Summary:
An undef extract index can be arbitrarily chosen to be an
out-of-range index value, which would result in the instruction being undef.

This change closes a gap identified while working on lowering vector permute intrinsics
with variable index vectors to pure LLVM IR.

Reviewers: arsenm, spatel, majnemer

Reviewed By: arsenm, spatel

Subscribers: fhahn, nhaehnle, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D40231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319910 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Analysis/InstructionSimplify.cpp b/lib/Analysis/InstructionSimplify.cpp
index 622b1f25df6..09f516a8cb9 100644
--- a/lib/Analysis/InstructionSimplify.cpp
+++ b/lib/Analysis/InstructionSimplify.cpp
@@ -3901,6 +3901,11 @@ static Value *SimplifyExtractElementInst(Value *Vec, Value *Idx, const SimplifyQ
     if (Value *Elt = findScalarElement(Vec, IdxC->getZExtValue()))
       return Elt;
 
+  // An undef extract index can be arbitrarily chosen to be an out-of-range
+  // index value, which would result in the instruction being undef.
+  if (isa<UndefValue>(Idx))
+    return UndefValue::get(Vec->getType()->getVectorElementType());
+
   return nullptr;
 }
 
diff --git a/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll b/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
index 441bc1adca7..2c35ed7f390 100644
--- a/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
+++ b/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
@@ -46,3 +46,10 @@ define i8 @test4(<8 x i8> %V) {
 ; CHECK-NEXT: %[[extract:.*]] = extractelement <8 x i8> %[[add]], i32 6
 ; CHECK-NEXT: ret i8 %[[extract]]
 }
+
+define i32 @test5(<4 x i32> %V) {
+  %extract = extractelement <4 x i32> %V, i32 undef
+  ret i32 %extract
+}
+; CHECK-LABEL: @test5(
+; CHECK: ret i32 undef