From: Piotr Sobczak Date: Thu, 3 Jan 2019 11:22:58 +0000 (+0000) Subject: [AMDGPU] Change section name with metadata access X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=114b83cbe2497f0ecf7873b703101bc161604cd5;p=llvm [AMDGPU] Change section name with metadata access Summary: The commit rL348922 introduced a means to set Metadata section kind for a global variable, if its explicit section name was prefixed with ".AMDGPU.metadata.". This patch changes that prefix to ".AMDGPU.comment.", as "metadata" in the section name might lead to ambiguity with metadata used by AMD PAL runtime. Change-Id: Idd4748800d6fe801441d91595fc21e5a4171e668 Reviewers: kzhuravl Reviewed By: kzhuravl Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D56197 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350292 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp b/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp index 7a720717cc8..c4e1efde130 100644 --- a/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp +++ b/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp @@ -34,7 +34,7 @@ MCSection *AMDGPUTargetObjectFile::getExplicitSectionGlobal( const GlobalObject *GO, SectionKind SK, const TargetMachine &TM) const { // Set metadata access for the explicit section StringRef SectionName = GO->getSection(); - if (SectionName.startswith(".AMDGPU.metadata.")) + if (SectionName.startswith(".AMDGPU.comment.")) SK = SectionKind::getMetadata(); return TargetLoweringObjectFileELF::getExplicitSectionGlobal(GO, SK, TM); diff --git a/test/CodeGen/AMDGPU/elf.metadata.ll b/test/CodeGen/AMDGPU/elf.metadata.ll index 097310a1673..9214ca2e68e 100644 --- a/test/CodeGen/AMDGPU/elf.metadata.ll +++ b/test/CodeGen/AMDGPU/elf.metadata.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=amdgcn -mcpu=fiji -filetype=obj | llvm-readobj -symbols -s -sd - | FileCheck %s ; CHECK: Section { -; CHECK: Name: .AMDGPU.metadata.info_1 +; CHECK: Name: .AMDGPU.comment.info_1 ; CHECK: Type: SHT_PROGBITS (0x1) ; CHECK: Flags [ (0x0) ; CHECK: Size: 16 @@ -11,7 +11,7 @@ ; CHECK: } ; CHECK: Section { -; CHECK: Name: .AMDGPU.metadata.info_2 +; CHECK: Name: .AMDGPU.comment.info_2 ; CHECK: Type: SHT_PROGBITS (0x1) ; CHECK: Flags [ (0x0) ; CHECK: Size: 16 @@ -21,7 +21,7 @@ ; CHECK: } ; CHECK: Section { -; CHECK: Name: .AMDGPU.metadata.info_3 +; CHECK: Name: .AMDGPU.comment.info_3 ; CHECK: Type: SHT_PROGBITS (0x1) ; CHECK: Flags [ (0x0) ; CHECK: Size: 16 @@ -31,26 +31,26 @@ ; CHECK: } ; CHECK: Symbol { -; CHECK: Name: metadata_info_var_1 +; CHECK: Name: comment_info_var_1 ; CHECK: Size: 16 ; CHECK: Binding: Local -; CHECK: Section: .AMDGPU.metadata.info_1 +; CHECK: Section: .AMDGPU.comment.info_1 ; CHECK: } ; CHECK: Symbol { -; CHECK: Name: metadata_info_var_2 +; CHECK: Name: comment_info_var_2 ; CHECK: Size: 16 ; CHECK: Binding: Global -; CHECK: Section: .AMDGPU.metadata.info_2 +; CHECK: Section: .AMDGPU.comment.info_2 ; CHECK: } ; CHECK: Symbol { -; CHECK: Name: metadata_info_var_3 +; CHECK: Name: comment_info_var_3 ; CHECK: Size: 16 ; CHECK: Binding: Global -; CHECK: Section: .AMDGPU.metadata.info_3 +; CHECK: Section: .AMDGPU.comment.info_3 ; CHECK: } -@metadata_info_var_1 = internal global [4 x i32][i32 826559809, i32 826559809, i32 826559809, i32 826559809], align 1, section ".AMDGPU.metadata.info_1" -@metadata_info_var_2 = constant [4 x i32][i32 843337025, i32 843337025, i32 843337025, i32 843337025], align 1, section ".AMDGPU.metadata.info_2" -@metadata_info_var_3 = global [4 x i32][i32 860114241, i32 860114241, i32 860114241, i32 860114241], align 1, section ".AMDGPU.metadata.info_3" +@comment_info_var_1 = internal global [4 x i32][i32 826559809, i32 826559809, i32 826559809, i32 826559809], align 1, section ".AMDGPU.comment.info_1" +@comment_info_var_2 = constant [4 x i32][i32 843337025, i32 843337025, i32 843337025, i32 843337025], align 1, section ".AMDGPU.comment.info_2" +@comment_info_var_3 = global [4 x i32][i32 860114241, i32 860114241, i32 860114241, i32 860114241], align 1, section ".AMDGPU.comment.info_3"