From: Alex Bradbury <asb@lowrisc.org>
Date: Tue, 14 Feb 2017 05:17:23 +0000 (+0000)
Subject: [RISCV] Pseudo instructions are isCodeGenOnly, have blank asmstr
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=0f17e9df2d9c865cf84e4e1bbc426a3253d80658;p=llvm

[RISCV] Pseudo instructions are isCodeGenOnly, have blank asmstr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295027 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/RISCV/RISCVInstrFormats.td b/lib/Target/RISCV/RISCVInstrFormats.td
index 1e9bc3bf9bc..3fab7122f6f 100644
--- a/lib/Target/RISCV/RISCVInstrFormats.td
+++ b/lib/Target/RISCV/RISCVInstrFormats.td
@@ -44,8 +44,9 @@ class RISCVInst<dag outs, dag ins, string asmstr, list<dag> pattern>
 
 // Pseudo instructions
 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
-    : RISCVInst<outs, ins, asmstr, pattern> {
+    : RISCVInst<outs, ins, "", pattern> {
   let isPseudo = 1;
+  let isCodeGenOnly = 1;
 }
 
 class FR<bits<7> funct7, bits<3> funct3, bits<7> opcode, dag outs, dag ins,