From: Angie Chiang Date: Wed, 28 Oct 2015 21:09:13 +0000 (-0700) Subject: Add dct_dct config to vp10_inv_txfm2d_cfg X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=09c2809a50e4076c359d0274bc1339af3e924183;p=libvpx Add dct_dct config to vp10_inv_txfm2d_cfg Change-Id: Id5b795198552443a700413284a1015296e267dcf --- diff --git a/vp10/common/vp10_inv_txfm2d_cfg.h b/vp10/common/vp10_inv_txfm2d_cfg.h new file mode 100644 index 000000000..59f8542af --- /dev/null +++ b/vp10/common/vp10_inv_txfm2d_cfg.h @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2015 The WebM project authors. All Rights Reserved. + * + * Use of this source code is governed by a BSD-style license + * that can be found in the LICENSE file in the root of the source + * tree. An additional intellectual property rights grant can be found + * in the file PATENTS. All contributing project authors may + * be found in the AUTHORS file in the root of the source tree. + */ + +#ifndef VP10_INV_TXFM2D_CFG_H_ +#define VP10_INV_TXFM2D_CFG_H_ +#include "vp10/common/vp10_inv_txfm1d.h" + +// ---------------- config inv_dct_dct_4 ---------------- +static const int8_t inv_shift_dct_dct_4[2] = {1, -5}; +static const int8_t inv_stage_range_col_dct_dct_4[4] = {17, 17, 16, 16}; +static const int8_t inv_stage_range_row_dct_dct_4[4] = {16, 16, 16, 16}; +static const int8_t inv_cos_bit_col_dct_dct_4[4] = {15, 15, 15, 15}; +static const int8_t inv_cos_bit_row_dct_dct_4[4] = {15, 15, 15, 15}; + +static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_4 = { + .txfm_size = 4, + .stage_num_col = 4, + .stage_num_row = 4, + + .shift = inv_shift_dct_dct_4, + .stage_range_col = inv_stage_range_col_dct_dct_4, + .stage_range_row = inv_stage_range_row_dct_dct_4, + .cos_bit_col = inv_cos_bit_col_dct_dct_4, + .cos_bit_row = inv_cos_bit_row_dct_dct_4, + .txfm_func_col = vp10_idct4_new, + .txfm_func_row = vp10_idct4_new}; + +// ---------------- config inv_dct_dct_8 ---------------- +static const int8_t inv_shift_dct_dct_8[2] = {0, -5}; +static const int8_t inv_stage_range_col_dct_dct_8[6] = {17, 17, 17, 17, 16, 16}; +static const int8_t inv_stage_range_row_dct_dct_8[6] = {17, 17, 17, 17, 17, 17}; +static const int8_t inv_cos_bit_col_dct_dct_8[6] = {15, 15, 15, 15, 15, 15}; +static const int8_t inv_cos_bit_row_dct_dct_8[6] = {15, 15, 15, 15, 15, 15}; + +static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_8 = { + .txfm_size = 8, + .stage_num_col = 6, + .stage_num_row = 6, + + .shift = inv_shift_dct_dct_8, + .stage_range_col = inv_stage_range_col_dct_dct_8, + .stage_range_row = inv_stage_range_row_dct_dct_8, + .cos_bit_col = inv_cos_bit_col_dct_dct_8, + .cos_bit_row = inv_cos_bit_row_dct_dct_8, + .txfm_func_col = vp10_idct8_new, + .txfm_func_row = vp10_idct8_new}; + +// ---------------- config inv_dct_dct_16 ---------------- +static const int8_t inv_shift_dct_dct_16[2] = {0, -6}; +static const int8_t inv_stage_range_col_dct_dct_16[8] = {18, 18, 18, 18, + 18, 18, 17, 17}; +static const int8_t inv_stage_range_row_dct_dct_16[8] = {18, 18, 18, 18, + 18, 18, 18, 18}; +static const int8_t inv_cos_bit_col_dct_dct_16[8] = {14, 14, 14, 14, + 14, 14, 14, 15}; +static const int8_t inv_cos_bit_row_dct_dct_16[8] = {14, 14, 14, 14, + 14, 14, 14, 14}; + +static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_16 = { + .txfm_size = 16, + .stage_num_col = 8, + .stage_num_row = 8, + + .shift = inv_shift_dct_dct_16, + .stage_range_col = inv_stage_range_col_dct_dct_16, + .stage_range_row = inv_stage_range_row_dct_dct_16, + .cos_bit_col = inv_cos_bit_col_dct_dct_16, + .cos_bit_row = inv_cos_bit_row_dct_dct_16, + .txfm_func_col = vp10_idct16_new, + .txfm_func_row = vp10_idct16_new}; + +// ---------------- config inv_dct_dct_32 ---------------- +static const int8_t inv_shift_dct_dct_32[2] = {-1, -6}; +static const int8_t inv_stage_range_col_dct_dct_32[10] = {18, 18, 18, 18, 18, + 18, 18, 18, 17, 17}; +static const int8_t inv_stage_range_row_dct_dct_32[10] = {19, 19, 19, 19, 19, + 19, 19, 19, 19, 19}; +static const int8_t inv_cos_bit_col_dct_dct_32[10] = {14, 14, 14, 14, 14, + 14, 14, 14, 14, 15}; +static const int8_t inv_cos_bit_row_dct_dct_32[10] = {13, 13, 13, 13, 13, + 13, 13, 13, 13, 13}; + +static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_32 = { + .txfm_size = 32, + .stage_num_col = 10, + .stage_num_row = 10, + + .shift = inv_shift_dct_dct_32, + .stage_range_col = inv_stage_range_col_dct_dct_32, + .stage_range_row = inv_stage_range_row_dct_dct_32, + .cos_bit_col = inv_cos_bit_col_dct_dct_32, + .cos_bit_row = inv_cos_bit_row_dct_dct_32, + .txfm_func_col = vp10_idct32_new, + .txfm_func_row = vp10_idct32_new}; + +#endif // VP10_INV_TXFM2D_CFG_H_ diff --git a/vp10/vp10_common.mk b/vp10/vp10_common.mk index 4b7a78439..461815c91 100644 --- a/vp10/vp10_common.mk +++ b/vp10/vp10_common.mk @@ -71,6 +71,7 @@ VP10_COMMON_SRCS-yes += common/vp10_inv_txfm1d.c VP10_COMMON_SRCS-yes += common/vp10_fwd_txfm2d.h VP10_COMMON_SRCS-yes += common/vp10_fwd_txfm2d.c VP10_COMMON_SRCS-yes += common/vp10_fwd_txfm2d_cfg.h +VP10_COMMON_SRCS-yes += common/vp10_inv_txfm2d_cfg.h VP10_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/postproc.h VP10_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/postproc.c