From: Sanjay Patel <spatel@rotateright.com>
Date: Wed, 22 Jun 2016 14:18:04 +0000 (+0000)
Subject: [InstSimplify] add ashr tests including vector types
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=0993083d68dffc08a4a643100f622f37100a0c59;p=llvm

[InstSimplify] add ashr tests including vector types


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273421 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/Transforms/InstSimplify/shr-nop.ll b/test/Transforms/InstSimplify/shr-nop.ll
index f48abc9d373..00fc328d2c8 100644
--- a/test/Transforms/InstSimplify/shr-nop.ll
+++ b/test/Transforms/InstSimplify/shr-nop.ll
@@ -388,3 +388,45 @@ define i32 @exact_ashr_lowbit(i32 %shiftval) {
   %shr = ashr exact i32 7, %shiftval
   ret i32 %shr
 }
+
+define i32 @ashr_zero(i32 %shiftval) {
+; CHECK-LABEL: @ashr_zero(
+; CHECK-NEXT:    ret i32 0
+;
+  %shr = ashr i32 0, %shiftval
+  ret i32 %shr
+}
+
+define i257 @ashr_minus1(i257 %shiftval) {
+; CHECK-LABEL: @ashr_minus1(
+; CHECK-NEXT:    ret i257 -1
+;
+  %shr = ashr i257 -1, %shiftval
+  ret i257 %shr
+}
+
+define <2 x i4097> @ashr_zero_vec(<2 x i4097> %shiftval) {
+; CHECK-LABEL: @ashr_zero_vec(
+; CHECK-NEXT:    ret <2 x i4097> zeroinitializer
+;
+  %shr = ashr <2 x i4097> zeroinitializer, %shiftval
+  ret <2 x i4097> %shr
+}
+
+define <2 x i64> @ashr_minus1_vec(<2 x i64> %shiftval) {
+; CHECK-LABEL: @ashr_minus1_vec(
+; CHECK-NEXT:    ret <2 x i64> <i64 -1, i64 -1>
+;
+  %shr = ashr <2 x i64> <i64 -1, i64 -1>, %shiftval
+  ret <2 x i64> %shr
+}
+
+define <2 x i4> @ashr_zero_minus1_vec(<2 x i4> %shiftval) {
+; CHECK-LABEL: @ashr_zero_minus1_vec(
+; CHECK-NEXT:    [[SHR:%.*]] = ashr <2 x i4> <i4 0, i4 -1>, %shiftval
+; CHECK-NEXT:    ret <2 x i4> [[SHR]]
+;
+  %shr = ashr <2 x i4> <i4 0, i4 -1>, %shiftval
+  ret <2 x i4> %shr
+}
+