From: Roman Divacky Date: Wed, 18 May 2011 19:36:54 +0000 (+0000) Subject: Add ARMTargetCodeGenInfo::initDwarfEHRegSizeTable() defining 16 32bit regs. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=09345d1c2adf95ea90f06911dbb4f12372b7f24c;p=clang Add ARMTargetCodeGenInfo::initDwarfEHRegSizeTable() defining 16 32bit regs. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@131558 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp index bc2472cebb..73526fbfdd 100644 --- a/lib/CodeGen/TargetInfo.cpp +++ b/lib/CodeGen/TargetInfo.cpp @@ -2279,6 +2279,22 @@ public: int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { return 13; } + + bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, + llvm::Value *Address) const { + CodeGen::CGBuilderTy &Builder = CGF.Builder; + llvm::LLVMContext &Context = CGF.getLLVMContext(); + + const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); + llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); + + // 0-15 are the 16 integer registers. + AssignToArrayRange(Builder, Address, Four8, 0, 15); + + return false; + } + + }; }