From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Thu, 7 Dec 2017 14:35:17 +0000 (+0000)
Subject: [X86][SVM] Tag SVM instructions scheduler classes
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=0604a7251aa9107a3f4206b97d73c4d1d27e0503;p=llvm

[X86][SVM] Tag SVM instructions scheduler classes

Tagged all as system instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320047 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrSVM.td b/lib/Target/X86/X86InstrSVM.td
index 41867099a6c..bdf47860027 100644
--- a/lib/Target/X86/X86InstrSVM.td
+++ b/lib/Target/X86/X86InstrSVM.td
@@ -15,44 +15,44 @@
 //===----------------------------------------------------------------------===//
 // SVM instructions
 
+let SchedRW = [WriteSystem] in {
 // 0F 01 D9
-def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", []>, TB;
+def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", [], IIC_SVM>, TB;
 
 // 0F 01 DC
-def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", []>, TB;
+def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", [], IIC_STGI>, TB;
 
 // 0F 01 DD
-def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", []>, TB;
+def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", [], IIC_CLGI>, TB;
 
 // 0F 01 DE
 let Uses = [EAX] in
-def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit\t{%eax|eax}", []>, TB;
+def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit\t{%eax|eax}", [], IIC_SKINIT>, TB;
 
 // 0F 01 D8
 let Uses = [EAX] in
 def VMRUN32 : I<0x01, MRM_D8, (outs), (ins),
-                "vmrun\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
+                "vmrun\t{%eax|eax}", [], IIC_SVM>, TB, Requires<[Not64BitMode]>;
 let Uses = [RAX] in
 def VMRUN64 : I<0x01, MRM_D8, (outs), (ins),
-                "vmrun\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
+                "vmrun\t{%rax|rax}", [], IIC_SVM>, TB, Requires<[In64BitMode]>;
 
 // 0F 01 DA
 let Uses = [EAX] in
 def VMLOAD32 : I<0x01, MRM_DA, (outs), (ins),
-                "vmload\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
+                "vmload\t{%eax|eax}", [], IIC_SVM>, TB, Requires<[Not64BitMode]>;
 let Uses = [RAX] in
 def VMLOAD64 : I<0x01, MRM_DA, (outs), (ins),
-                "vmload\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
+                "vmload\t{%rax|rax}", [], IIC_SVM>, TB, Requires<[In64BitMode]>;
 
 // 0F 01 DB
 let Uses = [EAX] in
 def VMSAVE32 : I<0x01, MRM_DB, (outs), (ins),
-                "vmsave\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
+                "vmsave\t{%eax|eax}", [], IIC_SVM>, TB, Requires<[Not64BitMode]>;
 let Uses = [RAX] in
 def VMSAVE64 : I<0x01, MRM_DB, (outs), (ins),
-                "vmsave\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
+                "vmsave\t{%rax|rax}", [], IIC_SVM>, TB, Requires<[In64BitMode]>;
 
-let SchedRW = [WriteSystem] in {
 // 0F 01 DF
 let Uses = [EAX, ECX] in
 def INVLPGA32 : I<0x01, MRM_DF, (outs), (ins),
diff --git a/lib/Target/X86/X86Schedule.td b/lib/Target/X86/X86Schedule.td
index 8a0241699fd..18410d6227e 100644
--- a/lib/Target/X86/X86Schedule.td
+++ b/lib/Target/X86/X86Schedule.td
@@ -506,6 +506,10 @@ def IIC_SIDT : InstrItinClass;
 def IIC_SGDT : InstrItinClass;
 def IIC_SLDT : InstrItinClass;
 def IIC_STR : InstrItinClass;
+def IIC_SKINIT : InstrItinClass;
+def IIC_SVM : InstrItinClass;
+def IIC_CLGI : InstrItinClass;
+def IIC_STGI : InstrItinClass;
 def IIC_SWAPGS : InstrItinClass;
 def IIC_SYSCALL : InstrItinClass;
 def IIC_SYS_ENTER_EXIT : InstrItinClass;