From: Simon Pilgrim Date: Fri, 8 Feb 2019 16:51:16 +0000 (+0000) Subject: [X86] Add basic funnel shift demanded bits tests X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=02fc2083cc5f6dcdf8172cb396cdd6eb7b330586;p=llvm [X86] Add basic funnel shift demanded bits tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353534 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/X86/funnel-shift.ll b/test/CodeGen/X86/funnel-shift.ll index 0969d6d190c..ab6acabded9 100644 --- a/test/CodeGen/X86/funnel-shift.ll +++ b/test/CodeGen/X86/funnel-shift.ll @@ -318,6 +318,54 @@ define i7 @fshr_i7_const_fold() nounwind { ret i7 %f } +; demanded bits tests + +define i32 @fshl_i32_demandedbits(i32 %a0, i32 %a1) nounwind { +; X32-SSE2-LABEL: fshl_i32_demandedbits: +; X32-SSE2: # %bb.0: +; X32-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-SSE2-NEXT: movl $-2147483648, %ecx # imm = 0x80000000 +; X32-SSE2-NEXT: orl {{[0-9]+}}(%esp), %ecx +; X32-SSE2-NEXT: orl $1, %eax +; X32-SSE2-NEXT: shrdl $23, %ecx, %eax +; X32-SSE2-NEXT: retl +; +; X64-AVX2-LABEL: fshl_i32_demandedbits: +; X64-AVX2: # %bb.0: +; X64-AVX2-NEXT: movl %esi, %eax +; X64-AVX2-NEXT: orl $-2147483648, %edi # imm = 0x80000000 +; X64-AVX2-NEXT: orl $1, %eax +; X64-AVX2-NEXT: shrdl $23, %edi, %eax +; X64-AVX2-NEXT: retq + %x = or i32 %a0, 2147483648 + %y = or i32 %a1, 1 + %res = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 9) + ret i32 %res +} + +define i32 @fshr_i32_demandedbits(i32 %a0, i32 %a1) nounwind { +; X32-SSE2-LABEL: fshr_i32_demandedbits: +; X32-SSE2: # %bb.0: +; X32-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-SSE2-NEXT: movl $-2147483648, %ecx # imm = 0x80000000 +; X32-SSE2-NEXT: orl {{[0-9]+}}(%esp), %ecx +; X32-SSE2-NEXT: orl $1, %eax +; X32-SSE2-NEXT: shrdl $9, %ecx, %eax +; X32-SSE2-NEXT: retl +; +; X64-AVX2-LABEL: fshr_i32_demandedbits: +; X64-AVX2: # %bb.0: +; X64-AVX2-NEXT: movl %esi, %eax +; X64-AVX2-NEXT: orl $-2147483648, %edi # imm = 0x80000000 +; X64-AVX2-NEXT: orl $1, %eax +; X64-AVX2-NEXT: shrdl $9, %edi, %eax +; X64-AVX2-NEXT: retq + %x = or i32 %a0, 2147483648 + %y = or i32 %a1, 1 + %res = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 9) + ret i32 %res +} + ; With constant shift amount, this is 'shrd' or 'shld'. define i32 @fshr_i32_const_shift(i32 %x, i32 %y) nounwind {