From: James Molloy <james.molloy@arm.com>
Date: Fri, 25 Jul 2014 10:19:47 +0000 (+0000)
Subject: Revert part of r206963
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=024c76d36d46d203eb68c88f1b8a67321bf43dcc;p=clang

Revert part of r206963

Specifically the part where we removed a warning to be compatible with GCC, which has been widely regarded as a bad idea.

I'm not quite happy with how obtuse this warning is, especially in the fairly common case of a 32-bit integer literal, so I've got another patch awaiting review that adds a fixit to reduce confusion.



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@213935 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index b0ca5a547c..e78244d95c 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -4503,6 +4503,33 @@ public:
     return false;
   }
 
+  virtual bool validateConstraintModifier(StringRef Constraint,
+                                          const char Modifier,
+                                          unsigned Size) const {
+    // Strip off constraint modifiers.
+    while (Constraint[0] == '=' || Constraint[0] == '+' || Constraint[0] == '&')
+      Constraint = Constraint.substr(1);
+
+    switch (Constraint[0]) {
+    default:
+      return true;
+    case 'z':
+    case 'r': {
+      switch (Modifier) {
+      case 'x':
+      case 'w':
+        // For now assume that the person knows what they're
+        // doing with the modifier.
+        return true;
+      default:
+        // By default an 'r' constraint will be in the 'x'
+        // registers.
+        return Size == 64;
+      }
+    }
+    }
+  }
+
   virtual const char *getClobbers() const { return ""; }
 
   int getEHDataRegisterNumber(unsigned RegNo) const {
diff --git a/test/Sema/arm64-inline-asm.c b/test/Sema/arm64-inline-asm.c
index 08eb669265..2cfbe46929 100644
--- a/test/Sema/arm64-inline-asm.c
+++ b/test/Sema/arm64-inline-asm.c
@@ -1,9 +1,9 @@
 // RUN: %clang_cc1 -triple arm64-apple-ios7.1 -fsyntax-only -verify %s
-// expected-no-diagnostics
 
 void foo() {
   asm volatile("USE(%0)" :: "z"(0LL));
   asm volatile("USE(%x0)" :: "z"(0LL));
   asm volatile("USE(%w0)" :: "z"(0));
 
+  asm volatile("USE(%0)" :: "z"(0)); // expected-warning {{value size does not match register size specified by the constraint and modifier}}
 }
diff --git a/test/Sema/inline-asm-validate.c b/test/Sema/inline-asm-validate.c
index c32dedb65e..6fa760c809 100644
--- a/test/Sema/inline-asm-validate.c
+++ b/test/Sema/inline-asm-validate.c
@@ -1,9 +1,8 @@
 // RUN: %clang_cc1 -triple arm64-apple-macosx10.8.0 -fsyntax-only -verify %s
-// expected-no-diagnostics
 
 unsigned t, r, *p;
 
 int foo (void) {
-  __asm__ __volatile__( "stxr   %w[_t], %[_r], [%[_p]]" : [_t] "=&r" (t) : [_p] "p" (p), [_r] "r" (r) : "memory");
+  __asm__ __volatile__( "stxr   %w[_t], %[_r], [%[_p]]" : [_t] "=&r" (t) : [_p] "p" (p), [_r] "r" (r) : "memory"); // expected-warning{{value size does not match register size specified by the constraint and modifier}}
   return 1;
 }