From: Tim Northover Date: Sun, 8 Dec 2013 15:24:55 +0000 (+0000) Subject: ARM: teach Sema that "r" can match 64-bit values X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=009ba3be47ee791bc7a60eed885ed0ea74d3ecc2;p=clang ARM: teach Sema that "r" can match 64-bit values We already support using "r" on 64-bit values (a GPRPair is allocated), but Sema doesn't know this yet so issues a warning. This should fix it. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@196724 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 8950fa0ab7..e10bd97154 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -4110,7 +4110,7 @@ public: case 'r': { switch (Modifier) { default: - return (isInOut || isOutput || Size <= 32); + return (isInOut || isOutput || Size <= 64); case 'q': // A register of size 32 cannot fit a vector type. return false; diff --git a/test/Sema/arm-asm.c b/test/Sema/arm-asm.c index 3fc0eeb754..e48718b0a2 100644 --- a/test/Sema/arm-asm.c +++ b/test/Sema/arm-asm.c @@ -5,3 +5,8 @@ void f (void) { asm volatile ("lw (r1), %0[val]": "=&b"(Val)); // expected-error {{invalid output constraint '=&b' in asm}} return; } + +void test_64bit_r(void) { + long long foo = 0, bar = 0; + asm volatile("INST %0, %1" : "=r"(foo) : "r"(bar)); +}