From: Simon Dardis Date: Fri, 16 Sep 2016 14:16:23 +0000 (+0000) Subject: [mips] Fix previous revert r281726. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=00577699618db7d9f22aa53670062246d096f291;p=llvm [mips] Fix previous revert r281726. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281729 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index e9ec4c7d647..74a8f4f2152 100644 --- a/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -446,14 +446,6 @@ template static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder); -template -static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); - -template -static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); - template static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, @@ -639,34 +631,6 @@ static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, return MCDisassembler::Success; } -template -static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { - InsnType Rt = fieldFromInstruction(insn, 16, 5); - InsnType Imm = fieldFromInstruction(insn, 0, 16); - MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, - Rt))); - MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, - Rt))); - MI.addOperand(MCOperand::createImm(Imm)); - - return MCDisassembler::Success; -} - -template -static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { - InsnType Rt = fieldFromInstruction(insn, 21, 5); - InsnType Imm = fieldFromInstruction(insn, 0, 16); - MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, - Rt))); - MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, - Rt))); - MI.addOperand(MCOperand::createImm(Imm)); - - return MCDisassembler::Success; -} - template static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address,