0x090 - 0x1F7FF are reserved for FIFOs.
-.. note:: This includes the CMD52 and CMD53 (block mode or byte mode).
+The address of CMD53 is related to the length requested to read from/write to
+the slave in a single transfer:
+
+ *requested length = 0x1F800-address*
+
+The slave will respond with the length according to the length field in
+CMD53, with the data longer than *requested length* filled with 0 (sending)
+or discard (receiving).
+
+.. note:: This includes both the block and the byte mode of CMD53.
The function number should be set to 1, OP Code should be set to 1 (for CMD53).
- The slave will respond with the length according to the length field in CMD53 (1 of CMD52), with the data longer
- than *requested length* filled with 0 (sending) or discard (receiving).
+ It is allowed to use CMD53 mode combination of block+byte to get higher
+ effeciency when accessing the FIFO by arbitrary length. E.g. The block
+ size is set to 512 by default, you can write/get 1031 bytes of data
+ to/from the FIFO by:
+
+ 1. Send CMD53 in block mode, block count=2 (1024 bytes) to address
+ 0x1F3F9=0x1F800-**1031**.
+ 2. Then send CMD53 in byte mode, byte count=8 (or 7 if your controller
+ supports that) to address 0x1F7F9=0x1F800-**7**.
Interrupts
----------
- Sending: slave to host transfers.
- Receiving: host to slave transfers.
-.. note:: Register names in ESP Rechnical Reference Manual are oriented from the point of view of the host, i.e. 'rx'
- registers refer to sending, while 'tx' registers refer to receiving. We're not using `tx` or `rx` in the driver to
+.. note:: Register names in ESP Rechnical Reference Manual are oriented from the point of view of the host, i.e. 'rx'
+ registers refer to sending, while 'tx' registers refer to receiving. We're not using `tx` or `rx` in the driver to
avoid ambiguities.
- FIFO: specific address in Function 1 that can be access by CMD53 to read/write large amount of data. The address is
related to the length requested to read from/write to the slave in a single transfer:
*requested length* = 0x1F800-address.
- Ownership: When the driver takes ownership of a buffer, it means the driver can randomly read/write the buffer
- (mostly by the hardware). The application should not read/write the buffer until the ownership is returned to the
- application. If the application reads from a buffer owned by a receiving driver, the data read can be random; if
- the application writes to a buffer owned by a sending driver, the data sent may be corrupted.
+ (usually via DMA). The application should not read/write the buffer until the ownership is returned to the
+ application. If the application reads from a buffer owned by a receiving driver, the data read can be random; if
+ the application writes to a buffer owned by a sending driver, the data sent may be corrupted.
- Requested length: The length requested in one transfer determined by the FIFO address.
- Transfer length: The length requested in one transfer determined by the CMD53 byte/block count field.