Merging r227603:

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r227603 | compnerd | 2015-01-30 11:35:18 -0800 (Fri, 30 Jan 2015) | 7 lines

ARM: further correct .fpu directive handling

If the original FPU specification involved a restricted VFP unit (d16), ensure
that we reset the functionality when we encounter a new FPU type.  In
particular, if the user specified vfpv3-d16, but switched to a VFPv3 (which has
32 double precision registers), we would fail to reset the D16 feature, and
treat it as being equivalent to vfpv3-d16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@227854 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 96f3b4e64326c0de156fac6d46d28f5bd4c9f533..4fd3c9056e1ab3dd8dcbdc6c8a377074cf21ded3 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -9197,11 +9197,12 @@ static const struct {
 } FPUs[] = {
     {ARM::VFP, ARM::FeatureVFP2, ARM::FeatureNEON},
     {ARM::VFPV2, ARM::FeatureVFP2, ARM::FeatureNEON},
-    {ARM::VFPV3, ARM::FeatureVFP2 | ARM::FeatureVFP3, ARM::FeatureNEON},
+    {ARM::VFPV3, ARM::FeatureVFP2 | ARM::FeatureVFP3,
+     ARM::FeatureNEON | ARM::FeatureD16},
     {ARM::VFPV3_D16, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureD16,
      ARM::FeatureNEON},
     {ARM::VFPV4, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4,
-     ARM::FeatureNEON},
+     ARM::FeatureNEON | ARM::FeatureD16},
     {ARM::VFPV4_D16,
      ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureD16,
      ARM::FeatureNEON},
@@ -9210,19 +9211,20 @@ static const struct {
      ARM::FeatureNEON | ARM::FeatureCrypto},
     {ARM::FP_ARMV8, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 |
                         ARM::FeatureFPARMv8,
-     ARM::FeatureNEON | ARM::FeatureCrypto},
-    {ARM::NEON, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureNEON, 0},
+     ARM::FeatureNEON | ARM::FeatureCrypto | ARM::FeatureD16},
+    {ARM::NEON, ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureNEON,
+     ARM::FeatureD16},
     {ARM::NEON_VFPV4,
      ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 | ARM::FeatureNEON,
-     0},
+     ARM::FeatureD16},
     {ARM::NEON_FP_ARMV8,
      ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 |
          ARM::FeatureFPARMv8 | ARM::FeatureNEON,
-     ARM::FeatureCrypto},
+     ARM::FeatureCrypto | ARM::FeatureD16},
     {ARM::CRYPTO_NEON_FP_ARMV8,
      ARM::FeatureVFP2 | ARM::FeatureVFP3 | ARM::FeatureVFP4 |
          ARM::FeatureFPARMv8 | ARM::FeatureNEON | ARM::FeatureCrypto,
-     0},
+     ARM::FeatureD16},
     {ARM::SOFTVFP, 0, 0},
 };
 

diff --git a/test/MC/ARM/pr22395-2.s b/test/MC/ARM/pr22395-2.s
new file mode 100644 (file)
index 0000000..3d2a10d
--- /dev/null
+++ b/test/MC/ARM/pr22395-2.s
@@ -0,0 +1,37 @@
+@ RUN: llvm-mc -triple armv4t-eabi -mattr +d16 -filetype asm -o - %s 2>&1 | FileCheck %s
+
+       .text
+       .thumb
+
+       .p2align 2
+
+       .fpu vfpv3
+       vldmia r0, {d16-d31}
+@ CHECK: vldmia        r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
+@ CHECK-NOT: error: register expected
+
+       .fpu vfpv4
+       vldmia r0, {d16-d31}
+@ CHECK: vldmia        r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
+@ CHECK-NOT: error: register expected
+
+       .fpu neon
+       vldmia r0, {d16-d31}
+@ CHECK: vldmia        r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
+@ CHECK-NOT: error: register expected
+
+       .fpu neon-vfpv4
+       vldmia r0, {d16-d31}
+@ CHECK: vldmia        r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
+@ CHECK-NOT: error: register expected
+
+       .fpu neon-fp-armv8
+       vldmia r0, {d16-d31}
+@ CHECK: vldmia        r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
+@ CHECK-NOT: error: register expected
+
+       .fpu crypto-neon-fp-armv8
+       vldmia r0, {d16-d31}
+@ CHECK: vldmia        r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
+@ CHECK-NOT: error: register expected
+