Fix asm constraint of fetch_and_add, test_and_set, fetch_CAS for MIPS (gcc)

* src/atomic_ops/sysdeps/gcc/mips.h (AO_fetch_and_add,
AO_test_and_set, AO_fetch_compare_and_swap): Use "+m" asm constraint
for *addr instead of "=m" (because the value pointed by addr is read
and written by the code).

diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h
index bf14a3895d12796e1b050a9bc4b3a94438cea7b0..a891de6eccb6ec1a4a667865ad03453a1c820c27 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/mips.h
+++ b/src/atomic_ops/sysdeps/gcc/mips.h
@@ -59,7 +59,6 @@ AO_fetch_and_add(volatile AO_t *addr, AO_t incr)
   register int temp;
 
   __asm__ __volatile__(
-
       "       .set push\n"
       "       .set mips2\n"
       "       .set noreorder\n"
@@ -71,7 +70,7 @@ AO_fetch_and_add(volatile AO_t *addr, AO_t incr)
       "       beqz %1, 1b\n"
       "       nop\n"
       "       .set pop "
-      : "=&r" (result), "=&r" (temp), "=m" (*addr)
+      : "=&r" (result), "=&r" (temp), "+m" (*addr)
       : "Ir" (incr)
       : "memory");
   return (AO_t)result;
@@ -96,7 +95,7 @@ AO_test_and_set(volatile AO_TS_t *addr)
       "       beqz %1, 1b\n"
       "       nop\n"
       "       .set pop "
-      : "=&r" (oldval), "=&r" (temp), "=m" (*addr)
+      : "=&r" (oldval), "=&r" (temp), "+m" (*addr)
       : "r" (1)
       : "memory");
   return (AO_TS_VAL_t)oldval;
@@ -155,7 +154,7 @@ AO_fetch_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val)
       "       nop\n"
       "       .set pop\n"
       "2:"
-      : "=&r" (fetched_val), "=&r" (temp), "=m" (*addr)
+      : "=&r" (fetched_val), "=&r" (temp), "+m" (*addr)
       : "r" (new_val), "Jr" (old)
       : "memory");
   return (AO_t)fetched_val;