]> granicus.if.org Git - clang/commitdiff
Add missing intrinsic function vbsl_f64 for AArch64 NEON.
authorJiangning Liu <jiangning.liu@arm.com>
Fri, 29 Nov 2013 01:38:49 +0000 (01:38 +0000)
committerJiangning Liu <jiangning.liu@arm.com>
Fri, 29 Nov 2013 01:38:49 +0000 (01:38 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@195940 91177308-0d34-0410-b5e6-96231b3b80d8

include/clang/Basic/arm_neon.td
test/CodeGen/aarch64-neon-intrinsics.c

index f4aa838f74a3b2cd72cbbc8f32615737e35da7ea..9158972954d29d420769b8b41498d4b300933b42 100644 (file)
@@ -626,7 +626,7 @@ def FMLS : SInst<"vfms", "dddd", "fQfQd">;
 // Logical operations
 // With additional Qd, Ql, QPl type.
 def BSL : SInst<"vbsl", "dudd",
-                "csilUcUsUiUlfPcPsQcQsQiQlQUcQUsQUiQUlQfQPcQPsQdPlQPl">;
+                "csilUcUsUiUlfdPcPsQcQsQiQlQUcQUsQUiQUlQfQPcQPsQdPlQPl">;
 
 ////////////////////////////////////////////////////////////////////////////////
 // Absolute Difference
index 1cca5d210490879640700fa43d9160f522536c16..a26bcf29c7e1f8197591b630a8f5fd237d7f66dd 100644 (file)
@@ -783,6 +783,12 @@ float32x2_t test_vbsl_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
   // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
 }
 
+float64x1_t test_vbsl_f64(uint64x1_t v1, float64x1_t v2, float64x1_t v3) {
+  // CHECK: test_vbsl_f64
+  return vbsl_f64(v1, v2, v3);
+  // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
+}
+
 poly8x8_t test_vbsl_p8(uint8x8_t v1, poly8x8_t v2, poly8x8_t v3) {
   // CHECK: test_vbsl_p8
   return vbsl_p8(v1, v2, v3);